Searched refs:MCLK_APBCMASK_TC1 (Results 1 – 5 of 5) sorted by relevance
125 SYSTEM_CLOCK_APB_APBC, MCLK_APBCMASK_TC1, in tc_init()134 SYSTEM_CLOCK_APB_APBC, MCLK_APBCMASK_TC1, in tc_init()143 SYSTEM_CLOCK_APB_APBC, MCLK_APBCMASK_TC1, in tc_init()151 SYSTEM_CLOCK_APB_APBC, MCLK_APBCMASK_TC1, in tc_init()
1649 ((Mclk *)hw)->APBCMASK.reg |= MCLK_APBCMASK_TC1; in hri_mclk_set_APBCMASK_TC1_bit()1657 tmp = (tmp & MCLK_APBCMASK_TC1) >> MCLK_APBCMASK_TC1_Pos; in hri_mclk_get_APBCMASK_TC1_bit()1666 tmp &= ~MCLK_APBCMASK_TC1; in hri_mclk_write_APBCMASK_TC1_bit()1675 ((Mclk *)hw)->APBCMASK.reg &= ~MCLK_APBCMASK_TC1; in hri_mclk_clear_APBCMASK_TC1_bit()1682 ((Mclk *)hw)->APBCMASK.reg ^= MCLK_APBCMASK_TC1; in hri_mclk_toggle_APBCMASK_TC1_bit()
325 #define MCLK_APBCMASK_TC1 (_U_(0x1) << MCLK_APBCMASK_TC1_Pos) macro
365 #define MCLK_APBCMASK_TC1 MCLK_APBCMASK_TC1_Msk /**< \de… macro
2007 ((Mclk *)hw)->APBCMASK.reg |= MCLK_APBCMASK_TC1; in hri_mclk_set_APBCMASK_TC1_bit()2015 tmp = (tmp & MCLK_APBCMASK_TC1) >> MCLK_APBCMASK_TC1_Pos; in hri_mclk_get_APBCMASK_TC1_bit()2024 tmp &= ~MCLK_APBCMASK_TC1; in hri_mclk_write_APBCMASK_TC1_bit()2033 ((Mclk *)hw)->APBCMASK.reg &= ~MCLK_APBCMASK_TC1; in hri_mclk_clear_APBCMASK_TC1_bit()2040 ((Mclk *)hw)->APBCMASK.reg ^= MCLK_APBCMASK_TC1; in hri_mclk_toggle_APBCMASK_TC1_bit()
Completed in 21 milliseconds