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Searched refs:MCLK_APBCMASK_TCC2 (Results 1 – 8 of 8) sorted by relevance

/bsp/microchip/samc21/bsp/samc21/include/component/
A Dmclk.h321 #define MCLK_APBCMASK_TCC2 (_U_(0x1) << MCLK_APBCMASK_TCC2_Pos) macro
/bsp/microchip/samc21/bsp/hri/
A Dhri_mclk_c21.h1927 ((Mclk *)hw)->APBCMASK.reg |= MCLK_APBCMASK_TCC2; in hri_mclk_set_APBCMASK_TCC2_bit()
1935 tmp = (tmp & MCLK_APBCMASK_TCC2) >> MCLK_APBCMASK_TCC2_Pos; in hri_mclk_get_APBCMASK_TCC2_bit()
1944 tmp &= ~MCLK_APBCMASK_TCC2; in hri_mclk_write_APBCMASK_TCC2_bit()
1953 ((Mclk *)hw)->APBCMASK.reg &= ~MCLK_APBCMASK_TCC2; in hri_mclk_clear_APBCMASK_TCC2_bit()
1960 ((Mclk *)hw)->APBCMASK.reg ^= MCLK_APBCMASK_TCC2; in hri_mclk_toggle_APBCMASK_TCC2_bit()
/bsp/microchip/same54/bsp/include/component/
A Dmclk.h388 #define MCLK_APBCMASK_TCC2 (_U_(0x1) << MCLK_APBCMASK_TCC2_Pos) macro
/bsp/microchip/samd51-seeed-wio-terminal/bsp/samd51a/include/component/
A Dmclk.h378 #define MCLK_APBCMASK_TCC2 (_U_(0x1) << MCLK_APBCMASK_TCC2_Pos) macro
/bsp/microchip/samd51-adafruit-metro-m4/bsp/samd51a/include/component/
A Dmclk.h378 #define MCLK_APBCMASK_TCC2 (_U_(0x1) << MCLK_APBCMASK_TCC2_Pos) macro
/bsp/microchip/samd51-seeed-wio-terminal/bsp/hri/
A Dhri_mclk_d51.h2392 ((Mclk *)hw)->APBCMASK.reg |= MCLK_APBCMASK_TCC2; in hri_mclk_set_APBCMASK_TCC2_bit()
2400 tmp = (tmp & MCLK_APBCMASK_TCC2) >> MCLK_APBCMASK_TCC2_Pos; in hri_mclk_get_APBCMASK_TCC2_bit()
2409 tmp &= ~MCLK_APBCMASK_TCC2; in hri_mclk_write_APBCMASK_TCC2_bit()
2418 ((Mclk *)hw)->APBCMASK.reg &= ~MCLK_APBCMASK_TCC2; in hri_mclk_clear_APBCMASK_TCC2_bit()
2425 ((Mclk *)hw)->APBCMASK.reg ^= MCLK_APBCMASK_TCC2; in hri_mclk_toggle_APBCMASK_TCC2_bit()
/bsp/microchip/same54/bsp/hri/
A Dhri_mclk_e54.h2552 ((Mclk *)hw)->APBCMASK.reg |= MCLK_APBCMASK_TCC2; in hri_mclk_set_APBCMASK_TCC2_bit()
2560 tmp = (tmp & MCLK_APBCMASK_TCC2) >> MCLK_APBCMASK_TCC2_Pos; in hri_mclk_get_APBCMASK_TCC2_bit()
2569 tmp &= ~MCLK_APBCMASK_TCC2; in hri_mclk_write_APBCMASK_TCC2_bit()
2578 ((Mclk *)hw)->APBCMASK.reg &= ~MCLK_APBCMASK_TCC2; in hri_mclk_clear_APBCMASK_TCC2_bit()
2585 ((Mclk *)hw)->APBCMASK.reg ^= MCLK_APBCMASK_TCC2; in hri_mclk_toggle_APBCMASK_TCC2_bit()
/bsp/microchip/samd51-adafruit-metro-m4/bsp/hri/
A Dhri_mclk_d51.h2392 ((Mclk *)hw)->APBCMASK.reg |= MCLK_APBCMASK_TCC2; in hri_mclk_set_APBCMASK_TCC2_bit()
2400 tmp = (tmp & MCLK_APBCMASK_TCC2) >> MCLK_APBCMASK_TCC2_Pos; in hri_mclk_get_APBCMASK_TCC2_bit()
2409 tmp &= ~MCLK_APBCMASK_TCC2; in hri_mclk_write_APBCMASK_TCC2_bit()
2418 ((Mclk *)hw)->APBCMASK.reg &= ~MCLK_APBCMASK_TCC2; in hri_mclk_clear_APBCMASK_TCC2_bit()
2425 ((Mclk *)hw)->APBCMASK.reg ^= MCLK_APBCMASK_TCC2; in hri_mclk_toggle_APBCMASK_TCC2_bit()

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