1 /*
2 * Copyright (C) 2017 ALLWINNERTECH TECHNOLOGY CO., LTD. All rights reserved.
3 *
4 * Redistribution and use in source and binary forms, with or without
5 * modification, are permitted provided that the following conditions
6 * are met:
7 * 1. Redistributions of source code must retain the above copyright
8 * notice, this list of conditions and the following disclaimer.
9 * 2. Redistributions in binary form must reproduce the above copyright
10 * notice, this list of conditions and the following disclaimer in the
11 * documentation and/or other materials provided with the
12 * distribution.
13 * 3. Neither the name of ALLWINNERTECH TECHNOLOGY CO., LTD. nor the names of
14 * its contributors may be used to endorse or promote products derived
15 * from this software without specific prior written permission.
16 *
17 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
18 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
19 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
20 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
21 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
22 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
23 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
24 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
25 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
26 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
27 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
28 */
29
30 #ifndef _DRIVER_CHIP_SDMMC_SDMMC_H_
31 #define _DRIVER_CHIP_SDMMC_SDMMC_H_
32
33 #include "card.h"
34
35 #ifdef __cplusplus
36 extern "C" {
37 #endif
38
39 #define SD_EXCLUSIVE_HOST
40
41 /* SD commands type argument response */
42 /* class 0 */
43 /* This is basically the same command as for MMC with some quirks. */
44 #define SD_SEND_RELATIVE_ADDR 3 /* bcr R6, ask the card to publish a new relative address */
45 #define SD_SEND_IF_COND 8 /* bcr [11:0] See below R7, sends Sd memory card interface condition, for sd 2.0 */
46 #define SD_SWITCH_VOLTAGE 11 /* ac R1, switch to 1.8V bus signaling level */
47
48 /* class 10 */
49 #define SD_SWITCH 6 /* adtc [31:0] See below R1, checks swithcable function(mode 0),And swtich card function(mode 1), for sd 1.x */
50
51 /* class 5 */
52 #define SD_ERASE_WR_BLK_START 32 /* ac [31:0] data addr R1 */
53 #define SD_ERASE_WR_BLK_END 33 /* ac [31:0] data addr R1 */
54
55 /* Application commands */
56 #define SD_APP_SET_BUS_WIDTH 6 /* ac [1:0] bus width R1 */
57 #define SD_APP_SD_STATUS 13 /* adtc R1 */
58 #define SD_APP_SEND_NUM_WR_BLKS 22 /* adtc R1 */
59 #define SD_APP_OP_COND 41 /* bcr [31:0] OCR R3 */
60 #define SD_APP_SEND_SCR 51 /* adtc R1 */
61
62 /* OCR bit definitions */
63 #define SD_OCR_S18R (1 << 24) /* 1.8V switching request */
64 #define SD_ROCR_S18A SD_OCR_S18R /* 1.8V switching accepted by card */
65 #define SD_OCR_XPC (1 << 28) /* SDXC power control */
66 #define SD_OCR_CCS (1 << 30) /* Card Capacity Status */
67
68 /*
69 * SD_SWITCH argument format:
70 *
71 * [31] Check (0) or switch (1)
72 * [30:24] Reserved (0)
73 * [23:20] Function group 6
74 * [19:16] Function group 5
75 * [15:12] Function group 4
76 * [11:8] Function group 3
77 * [7:4] Function group 2
78 * [3:0] Function group 1
79 */
80
81 /*
82 * SD_SEND_IF_COND argument format:
83 *
84 * [31:12] Reserved (0)
85 * [11:8] Host Voltage Supply Flags
86 * [7:0] Check Pattern (0xAA)
87 */
88
89 /*
90 * SCR field definitions
91 */
92 #define SCR_SPEC_VER_0 0 /* Implements system specification 1.0 - 1.01 */
93 #define SCR_SPEC_VER_1 1 /* Implements system specification 1.10 */
94 #define SCR_SPEC_VER_2 2 /* Implements system specification 2.00-3.0X */
95
96 /*
97 * SD bus widths
98 */
99 #define SD_BUS_WIDTH_1 0
100 #define SD_BUS_WIDTH_4 2
101
102 /*
103 * SD_SWITCH mode
104 */
105 #define SD_SWITCH_CHECK 0
106 #define SD_SWITCH_SET 1
107
108 /*
109 * SD_SWITCH function groups
110 */
111 #define SD_SWITCH_GRP_ACCESS 0
112
113 /*
114 * SD_SWITCH access modes
115 */
116 #define SD_SWITCH_ACCESS_DEF 0
117 #define SD_SWITCH_ACCESS_HS 1
118
119 /*command index*/
120 /*basic commands*/
121 #define MMC_GO_IDLE_STATE 0 /* bc,rest all cards to idle state */
122 #define MMC_ALL_SEND_CID 2 /* bcr R2, asks any card to send CID numbers */
123 #define MMC_SET_RELATIVE_ADDR 3 /* bcr,ask the card to publish a new relative address,R6 */
124 #define MMC_SET_DSR 4 /* bc,program the DSR of all cards,for sd 2.0 */
125 #define MMC_SELECT_CARD 7 /* ac [31:16] RCA R1, select or deselect one card */
126 #define MMC_SEND_EXT_CSD 8 /* adtc,the card sends it's ex_csd as a block of data,R1 */
127 #define MMC_SEND_CSD 9 /* ac [31:16] RCA R2, addressed card send CSD */
128 #define MMC_SEND_CID 10 /* ac, addressed card send CID,R2 */
129 #define MMC_READ_DATA_UNTIL_STOP 11 /* atdc,read data stream from catd until a STOP_TRANSMITISSION follows,R1 */
130 #define MMC_STOP_TRANSMISSION 12 /* ac, termilate a multiple block read/write operation,R1b */
131 #define MMC_SEND_STATUS 13 /* ac, addressed card send its status regesiter,R1 */
132 #define MMC_GO_INACTIVE_STATE 15 /* ac, sets the card to inactive state */
133 #define MMC_SEND_TUNING_PATTERN 19 /* adtc, send 64 bytes pattern for sdr50 and sdr104 mode */
134
135 /* erase commands*/
136 #define MMC_ERASE_WR_BLK_START 32 /* ac,sets the address of the first write bloock to be erased,R1 */
137 #define MMC_ERASE_WR_BLK_END 33 /* ac,sets the address of the last write bloock to be erased,R1 */
138
139 /*MMC private command*/
140 #define MMC_SEND_OP_COND 1 /* bcr,Activates the card's initialization process,R3 */
141 #define MMC_SWITCH 6 /* ac,switch the mode of operation of the selected card or modifies tge EXT_CSD,R1b */
142 #define MMC_BUSTEST_R 14 /* adtc,a host reads the reversed testing data pattern from a card,R1 */
143 #define MMC_BUSTEST_W 19 /* adtc,a host sends the bus teset data pattern to a card,R1 */
144
145 /*sd io command*/
146 #define IO_SEND_OP_COND 5 /* for SD IO.similar to ACMD41 for sd mem */
147 #define IO_RW_DIRECT 52
148 #define IO_RW_EXTENDED 53
149 #define SD_IO_CMD54 54
150
151 /* class 2 */
152 #define MMC_SET_BLOCKLEN 16 /* ac [31:0] block len R1, select a block length for all read/write cmds */
153 #define MMC_READ_SINGLE_BLOCK 17 /* adtc [31:0] data addr R1, reads a block of the size seclected by SET_BLOCKLEN */
154 #define MMC_READ_MULTIPLE_BLOCK 18 /* adtc [31:0] data addr R1, continuously send blocks of data until interrupted by a stop transmission commmad */
155 #define MMC_SEND_TUNING_BLOCK 19 /* adtc R1 */
156 #define MMC_SEND_TUNING_BLOCK_HS200 21 /* adtc R1 */
157
158 /* class 3 */
159 #define MMC_WRITE_DAT_UNTIL_STOP 20 /* adtc [31:0] data addr R1 */
160
161 /* class 4 */
162 #define MMC_SET_BLOCK_COUNT 23 /* adtc [31:0] data addr R1 */
163 #define MMC_WRITE_SINGLE_BLOCK 24 /* adtc [31:0] data addr R1, writes a block of the size seclected by SET_BLOCKLEN */
164 #define MMC_WRITE_MULTIPLE_BLOCK 25 /* adtc R1, continuously writes blocks of data until interrupted by a stop transmission commmad */
165 #define MMC_PROGRAM_CID 26 /* adtc R1 */
166 #define MMC_PROGRAM_CSD 27 /* adtc R1, program the programmable bits of CSD */
167
168 /* class 6 */
169 #define MMC_SET_WRITE_PROT 28 /* ac [31:0] data addr R1b, sets the write protect bit of the addressed group */
170 #define MMC_CLR_WRITE_PROT 29 /* ac [31:0] data addr R1b, clears the write protect bit of the addressed group */
171 #define MMC_SEND_WRITE_PROT 30 /* adtc [31:0] wpdata addr R1, ask the card to send status of the write protection bits */
172
173 /* class 5 */
174 #define MMC_ERASE_GROUP_START 35 /* ac [31:0] data addr R1 */
175 #define MMC_ERASE_GROUP_END 36 /* ac [31:0] data addr R1 */
176 #define MMC_ERASE 38 /* ac R1b, erase all selected write blocks */
177
178 /* class 9 */
179 #define MMC_FAST_IO 39 /* ac <Complex> R4, used to read or write 8 bit registers */
180 #define MMC_GO_IRQ_STATE 40 /* bcr R5, sets the system info interrupt mode */
181
182 /* class 7 */
183 #define MMC_LOCK_UNLOCK 42 /* adtc R1b, lock or unlock sd card */
184
185 /* class 8 */
186 #define MMC_APP_CMD 55 /* ac [31:16] RCA R1, indicates the next cmd is an specific cmd */
187 #define MMC_GEN_CMD 56 /* adtc [0] RD/WR R1, send or get a block of data */
188
mmc_op_multi(uint32_t opcode)189 static inline uint32_t mmc_op_multi(uint32_t opcode)
190 {
191 return opcode == MMC_WRITE_MULTIPLE_BLOCK ||
192 opcode == MMC_READ_MULTIPLE_BLOCK;
193 }
194
195 /*
196 * MMC_SWITCH argument format:
197 *
198 * [31:26] Always 0
199 * [25:24] Access Mode
200 * [23:16] Location of target Byte in EXT_CSD
201 * [15:08] Value Byte
202 * [07:03] Always 0
203 * [02:00] Command Set
204 */
205
206 /*
207 MMC status in R1, for native mode (SPI bits are different)
208 Type
209 e : error bit
210 s : status bit
211 r : detected and set for the actual command response
212 x : detected and set during command execution. the host must poll
213 the card by sending status command in order to read these bits.
214 Clear condition
215 a : according to the card state
216 b : always related to the previous command. Reception of
217 a valid command will clear it (with a delay of one command)
218 c : clear by read
219 */
220
221 #define R1_OUT_OF_RANGE (1 << 31) /* er, c */
222 #define R1_ADDRESS_ERROR (1 << 30) /* erx, c */
223 #define R1_BLOCK_LEN_ERROR (1 << 29) /* er, c */
224 #define R1_ERASE_SEQ_ERROR (1 << 28) /* er, c */
225 #define R1_ERASE_PARAM (1 << 27) /* ex, c */
226 #define R1_WP_VIOLATION (1 << 26) /* erx, c */
227 #define R1_CARD_IS_LOCKED (1 << 25) /* sx, a */
228 #define R1_LOCK_UNLOCK_FAILED (1 << 24) /* erx, c */
229 #define R1_COM_CRC_ERROR (1 << 23) /* er, b */
230 #define R1_ILLEGAL_COMMAND (1 << 22) /* er, b */
231 #define R1_CARD_ECC_FAILED (1 << 21) /* ex, c */
232 #define R1_CC_ERROR (1 << 20) /* erx, c */
233 #define R1_ERROR (1 << 19) /* erx, c */
234 #define R1_UNDERRUN (1 << 18) /* ex, c */
235 #define R1_OVERRUN (1 << 17) /* ex, c */
236 #define R1_CID_CSD_OVERWRITE (1 << 16) /* erx, c, CID/CSD overwrite */
237 #define R1_WP_ERASE_SKIP (1 << 15) /* sx, c */
238 #define R1_CARD_ECC_DISABLED (1 << 14) /* sx, a */
239 #define R1_ERASE_RESET (1 << 13) /* sr, c */
240 #define R1_STATUS(x) (x & 0xFFFFE000)
241 #define R1_CURRENT_STATE(x) ((x & 0x00001E00) >> 9) /* sx, b (4 bits) */
242 #define R1_READY_FOR_DATA (1 << 8) /* sx, a */
243 #define R1_SWITCH_ERROR (1 << 7) /* sx, c */
244 #define R1_APP_CMD (1 << 5) /* sr, c */
245
246 #define R1_STATE_IDLE 0
247 #define R1_STATE_READY 1
248 #define R1_STATE_IDENT 2
249 #define R1_STATE_STBY 3
250 #define R1_STATE_TRAN 4
251 #define R1_STATE_DATA 5
252 #define R1_STATE_RCV 6
253 #define R1_STATE_PRG 7
254 #define R1_STATE_DIS 8
255
256 /*ce-ata command*/
257 #define CEATA_RW_MULTIPLE_REGISTER 60
258 #define CEATA_RW_MULTIPLE_BLOCK 61
259
260 /*application specific commands used by sd mem*/
261 #define SET_BUS_WIDTH 6 /* ac,define the bus width(00 = 1bit, 10 = 4bit),R1 */
262 #define SD_STATUS 13 /* adtc,send the sd card status,R1 */
263 #define SEND_NUM_WR_BLOCKS 22 /* adtc,send the number of written write blocks,R1 */
264 #define SET_WR_BLK_ERASE_CNT 23 /* ac,set the number of write blocks to be pre-erased before writing,R1 */
265 #define SD_APP_OP_COND 41 /* bcr,asks the accessed card to send its OCR(operating conditon register) content,R3 */
266 #define SET_CLR_CARD_DETECT 42 /* ac,connect or disconnect the pull up resistor of the card for card detect,R1 */
267 #define SEND_SCR 51 /* adtc,reads the SCR(sd configure register),R1 */
268
269 /* MMC/SD in SPI mode reports R1 status always, and R2 for SEND_STATUS
270 * R1 is the low order byte; R2 is the next highest byte, when present.
271 */
272 #define R1_SPI_IDLE (1 << 0)
273 #define R1_SPI_ERASE_RESET (1 << 1)
274 #define R1_SPI_ILLEGAL_COMMAND (1 << 2)
275 #define R1_SPI_COM_CRC (1 << 3)
276 #define R1_SPI_ERASE_SEQ (1 << 4)
277 #define R1_SPI_ADDRESS (1 << 5)
278 #define R1_SPI_PARAMETER (1 << 6)
279
280 /* R1 bit 7 is always zero */
281 #define R2_SPI_CARD_LOCKED (1 << 8)
282 #define R2_SPI_WP_ERASE_SKIP (1 << 9) /* or lock/unlock fail */
283 #define R2_SPI_LOCK_UNLOCK_FAIL R2_SPI_WP_ERASE_SKIP
284 #define R2_SPI_ERROR (1 << 10)
285 #define R2_SPI_CC_ERROR (1 << 11)
286 #define R2_SPI_CARD_ECC_ERROR (1 << 12)
287 #define R2_SPI_WP_VIOLATION (1 << 13)
288 #define R2_SPI_ERASE_PARAM (1 << 14)
289 #define R2_SPI_OUT_OF_RANGE (1 << 15) /* or CSD overwrite */
290 #define R2_SPI_CSD_OVERWRITE R2_SPI_OUT_OF_RANGE
291
292 #define CEATA_INDENTIFY_DEVICE 0xec
293 #define CEATA_READ_DMA_EXT 0x25
294 #define CEATA_WRITE_DMA_EXT 0x35
295 #define CEATA_STANBY_IMMIDIATE 0xe0
296 #define CEATA_FLUSH_CACHE_EXT 0Xea
297
298 /*
299 * OCR bits are mostly in host.h
300 */
301 #define MMC_CARD_BUSY 0x80000000 /* Card Power up status bit */
302
303 /* Card Command Classes (CCC) */
304 #define CCC_BASIC (1<<0) /* (0) Basic protocol functions */
305 /* (CMD0,1,2,3,4,7,9,10,12,13,15) */
306 /* (and for SPI, CMD58,59) */
307 #define CCC_STREAM_READ (1<<1) /* (1) Stream read commands */
308 /* (CMD11) */
309 #define CCC_BLOCK_READ (1<<2) /* (2) Block read commands */
310 /* (CMD16,17,18) */
311 #define CCC_STREAM_WRITE (1<<3) /* (3) Stream write commands */
312 /* (CMD20) */
313 #define CCC_BLOCK_WRITE (1<<4) /* (4) Block write commands */
314 /* (CMD16,24,25,26,27) */
315 #define CCC_ERASE (1<<5) /* (5) Ability to erase blocks */
316 /* (CMD32,33,34,35,36,37,38,39) */
317 #define CCC_WRITE_PROT (1<<6) /* (6) Able to write protect blocks */
318 /* (CMD28,29,30) */
319 #define CCC_LOCK_CARD (1<<7) /* (7) Able to lock down card */
320 /* (CMD16,CMD42) */
321 #define CCC_APP_SPEC (1<<8) /* (8) Application specific */
322 /* (CMD55,56,57,ACMD*) */
323 #define CCC_IO_MODE (1<<9) /* (9) I/O mode */
324 /* (CMD5,39,40,52,53) */
325 #define CCC_SWITCH (1<<10) /* (10) High speed switch */
326 /* (CMD6,34,35,36,37,50) */
327 /* (11) Reserved */
328 /* (CMD?) */
329
330 /* CSD field definitions */
331 #define MMC_CSD_STRUCT_VER_1_0 0 /* Valid for system specification 1.0 - 1.2 */
332 #define MMC_CSD_STRUCT_VER_1_1 1 /* Valid for system specification 1.4 - 2.2 */
333 #define MMC_CSD_STRUCT_VER_1_2 2 /* Valid for system specification 3.1 - 3.2 - 3.31 - 4.0 - 4.1 */
334 #define MMC_CSD_STRUCT_EXT_CSD 3 /* Version is coded in CSD_STRUCTURE in EXT_CSD */
335
336 #define MMC_CSD_SPEC_VER_0 0 /* Implements system specification 1.0 - 1.2 */
337 #define MMC_CSD_SPEC_VER_1 1 /* Implements system specification 1.4 */
338 #define MMC_CSD_SPEC_VER_2 2 /* Implements system specification 2.0 - 2.2 */
339 #define MMC_CSD_SPEC_VER_3 3 /* Implements system specification 3.1 - 3.2 - 3.31 */
340 #define MMC_CSD_SPEC_VER_4 4 /* Implements system specification 4.0 - 4.1 */
341
342 /* EXT_CSD fields */
343 #define MMC_EXT_CSD_BOOT_BUS_COND 177 /* R/W */
344 #define MMC_EXT_CSD_PART_CONF 179 /* R/W */
345 #define MMC_EXT_CSD_BUS_WIDTH 183 /* R/W */
346 #define MMC_EXT_CSD_HS_TIMING 185 /* R/W */
347 #define MMC_EXT_CSD_CARD_TYPE 196 /* RO */
348 #define MMC_EXT_CSD_REV 192 /* RO */
349 #define MMC_EXT_CSD_SEC_CNT 212 /* RO, 4 bytes */
350
351 /* EXT_CSD field definitions */
352 #define MMC_EXT_CSD_CMD_SET_NORMAL (1<<0)
353 #define MMC_EXT_CSD_CMD_SET_SECURE (1<<1)
354 #define MMC_EXT_CSD_CMD_SET_CPSECURE (1<<2)
355
356 #define MMC_EXT_CSD_CARD_TYPE_26 (1<<0) /* Card can run at 26MHz */
357 #define MMC_EXT_CSD_CARD_TYPE_52 (1<<1) /* Card can run at 52MHz */
358
359 #define MMC_EXT_CSD_BUS_WIDTH_1 0 /* Card is in 1 bit mode */
360 #define MMC_EXT_CSD_BUS_WIDTH_4 1 /* Card is in 4 bit mode */
361 #define MMC_EXT_CSD_BUS_WIDTH_8 2 /* Card is in 8 bit mode */
362 #define MMC_EXT_CSD_BUS_WIDTH_4_DDR 5 /* Card is in 4 bit mode in DDR mode */
363 #define MMC_EXT_CSD_BUS_WIDTH_8_DDR 6 /* Card is in 8 bit mode in DDR mode */
364
365 /* MMC_SWITCH access modes */
366 #define MMC_SWITCH_MODE_CMD_SET 0x00 /* Change the command set */
367 #define MMC_SWITCH_MODE_SET_BITS 0x01 /* Set bits which are 1 in value */
368 #define MMC_SWITCH_MODE_CLEAR_BITS 0x02 /* Clear bits which are 1 in value */
369 #define MMC_SWITCH_MODE_WRITE_BYTE 0x03 /* Set target to value */
370
371 /* MMC_SWITCH boot modes */
372 #define MMC_SWITCH_MMCPART_NOAVAILABLE (0xff)
373 #define MMC_SWITCH_PART_ACCESS_MASK (0x7)
374 #define MMC_SWITCH_PART_SUPPORT (0x1)
375 #define MMC_SWITCH_PART_BOOT_PART_MASK (0x7 << 3)
376 #define MMC_SWITCH_PART_BOOT_PART_NONE (0x0)
377 #define MMC_SWITCH_PART_BOOT_PART_1 (0x1)
378 #define MMC_SWITCH_PART_BOOT_PART_2 (0x2)
379 #define MMC_SWITCH_PART_BOOT_USER (0x7)
380 #define MMC_SWITCH_PART_BOOT_ACK_MASK (0x1 << 6)
381 #define MMC_SWITCH_PART_BOOT_ACK_ENB (0x1)
382
383 /* MMC_SWITCH boot condition */
384 #define MMC_SWITCH_MMCBOOT_BUS_NOAVAILABLE (0xff)
385 #define MMC_SWITCH_BOOT_MODE_MASK (0x3 << 3)
386 #define MMC_SWITCH_BOOT_SDR_NORMAL (0x0)
387 #define MMC_SWITCH_BOOT_SDR_HS (0x1)
388 #define MMC_SWITCH_BOOT_DDR (0x2)
389 #define MMC_SWITCH_BOOT_RST_BUS_COND_MASK (0x1 << 2)
390 #define MMC_SWITCH_BOOT_RST_BUS_COND (0x0)
391 #define MMC_SWITCH_BOOT_RETAIN_BUS_COND (0x1)
392 #define MMC_SWITCH_BOOT_BUS_WIDTH_MASK (0x3 << 0)
393 #define MMC_SWITCH_BOOT_BUS_SDRx1_DDRx4 (0x0)
394 #define MMC_SWITCH_BOOT_BUS_SDRx4_DDRx4 (0x1)
395 #define MMC_SWITCH_BOOT_BUS_SDRx8_DDRx8 (0x2)
396
397 /* SD_SWITCH function groups */
398 #define SD_SWITCH_GRP_ACCESS_MODE 0
399 #define SD_SWITCH_GRP_CMD_SYSTEM 1
400 #define SD_SWITCH_GRP_DRV_STRENGTH 2
401 #define SD_SWITCH_GRP_CUR_LIMIT 3
402
403 /* SD_SWITCH access modes */
404 #define SD_SWITCH_ACCESS_DEF_SDR12 0
405 #define SD_SWITCH_ACCESS_HS_SDR25 1
406 #define SD_SWITCH_ACCESS_SDR50 2
407 #define SD_SWITCH_ACCESS_SDR104 3
408 #define SD_SWITCH_ACCESS_DDR50 4
409
410 /* SD_SWITCH cmd system */
411 #define SD_SWITCH_CMDSYS_DEF 0
412 #define SD_SWITCH_CMDSYS_EC 1
413 #define SD_SWITCH_CMDSYS_OTP 3
414 #define SD_SWITCH_CMDSYS_ASSD 4
415 #define SD_SWITCH_CMDSYS_ESD 0xc
416
417 /* SD_SWITCH driver strength */
418 #define SD_SWITCH_DRVSTR_DEF_TB 0
419 #define SD_SWITCH_DRVSTR_DEF_TA 1
420 #define SD_SWITCH_DRVSTR_DEF_TC 2
421 #define SD_SWITCH_DRVSTR_DEF_TD 3
422
423 /* SD_SWITCH current limit */
424 #define SD_SWITCH_CURLMT_DEF_200MA 0
425 #define SD_SWITCH_CURLMT_DEF_400MA 1
426 #define SD_SWITCH_CURLMT_DEF_600MA 2
427 #define SD_SWITCH_CURLMT_DEF_800MA 3
428
429 /**
430 * @brief read SD card.
431 * @param card:
432 * @arg card->card handler.
433 * @param buf:
434 * @arg buf->for store readed data.
435 * @param sblk:
436 * @arg sblk->start block num.
437 * @param nblk:
438 * @arg nblk->number of blocks.
439 * @retval 0 if success or other if failed.
440 */
441 extern int32_t mmc_block_read(struct mmc_card *card, uint8_t *buf, uint64_t sblk, uint32_t nblk);
442
443 /**
444 * @brief write SD card.
445 * @param card:
446 * @arg card->card handler.
447 * @param buf:
448 * @arg buf->data will be write.
449 * @param sblk:
450 * @arg sblk->start block num.
451 * @param nblk:
452 * @arg nblk->number of blocks.
453 * @retval 0 if success or other if failed.
454 */
455 extern int32_t mmc_block_write(struct mmc_card *card, const uint8_t *buf, uint64_t sblk, uint32_t nblk);
456
457 /**
458 * @brief scan or rescan SD card.
459 * @param card:
460 * @arg card->card handler.
461 * @param sdc_id:
462 * @arg sdc_id->SDC ID which card on.
463 * @retval 0 if success or other if failed.
464 */
465 extern int32_t mmc_rescan(struct mmc_card *card, uint32_t sdc_id);
466
467 /**
468 * @brief deinit SD card.
469 * @param card:
470 * @arg card->card handler.
471 * @retval 0 if success or other if failed.
472 */
473 extern int32_t mmc_card_deinit(struct mmc_card *card);
474
475 /**
476 * @brief malloc for card_info.
477 * @param card_id:
478 * @arg card ID.
479 * @retval 0 if success or other if failed.
480 */
481 extern int32_t mmc_card_create(uint8_t card_id, SDCard_InitTypeDef *param);
482
483 /**
484 * @brief free for card_info.
485 * @param card_id:
486 * @arg card ID.
487 * @retval 0 if success or other if failed.
488 */
489 extern int32_t mmc_card_delete(uint8_t card_id);
490
491 /**
492 * @brief get pointer of mmc_card.
493 * @param card_id:
494 * @arg card ID.
495 * @retval pointer of mmc_card if success or NULL if failed.
496 */
497 extern struct mmc_card* mmc_card_open(uint8_t card_id);
498
499 /**
500 * @brief close mmc_card.
501 * @param card_id:
502 * @arg card ID.
503 * @retval 0 if success or other if failed.
504 */
505 extern int32_t mmc_card_close(uint8_t card_id);
506 extern struct mmc_card_info* mmc_card_save(uint8_t card_id);
507 extern int32_t mmc_card_restore(struct mmc_card_info *s_card_info);
508
509 #ifdef __cplusplus
510 }
511 #endif
512
513 #endif /* _DRIVER_CHIP_SDMMC_SDMMC_H_ */
514