Searched refs:MMC_SDIO0_PLL_REGISTER (Results 1 – 2 of 2) sorted by relevance
370 #define MMC_SDIO0_PLL_REGISTER (CLK_DIV_BASE + 0x70) macro
784 mmio_write_32(MMC_SDIO0_PLL_REGISTER, MMC_MAX_CLOCK_DIV_VALUE); in rthw_sdhci_set_config()
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