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/bsp/airm2m/air105/libraries/HAL_Driver/Inc/
A Dair105_dcmi.h111 #define IS_DCMI_CAPTURE_MODE(MODE)(((MODE) == DCMI_CaptureMode_Continuous) || \ argument
112 ((MODE) == DCMI_CaptureMode_SnapShot))
125 #define IS_DCMI_SYNCHRO(MODE)(((MODE) == DCMI_SynchroMode_Hardware) || \ argument
126 ((MODE) == DCMI_SynchroMode_Embedded))
226 #define IS_DCMI_BYTESELECT_MODE(MODE) (((MODE) == DCMI_ByteSelect_Mode_AllByte) ||\ argument
227 ((MODE) == DCMI_ByteSelect_Mode_1of2_OddStart) ||\
228 ((MODE) == DCMI_ByteSelect_Mode_1of4_OddStart) ||\
232 ((MODE) == DCMI_ByteSelect_Mode_2of4_EvenStart))
240 #define IS_DCMI_LINESELECT_MODE(MODE) (((MODE) == DCMI_LineSelect_Mode_AllLine) ||\ argument
241 ((MODE) == DCMI_LineSelect_Mode_OddLine) ||\
[all …]
A Dair105_gpio.h46 #define IS_GPIO_MODE(MODE) (((MODE) == GPIO_Mode_IN_FLOATING) || \ argument
47 ((MODE) == GPIO_Mode_IPU) || \
48 ((MODE) == GPIO_Mode_Out_OD) || \
49 ((MODE) == GPIO_Mode_Out_PP) || \
50 ((MODE) == GPIO_Mode_Out_OD_PU))
194 #define IS_GPIO_WAKE_MODE(MODE) (((MODE) == GPIO_WakeMode_Now) || \ argument
195 ((MODE) == GPIO_WakeMode_AfterGlitch))
A Dair105_spi.h155 #define IS_SPI_DIRECTION_MODE(MODE) (((MODE) == SPI_Direction_2Lines_FullDuplex) || \ argument
156 ((MODE) == SPI_Direction_1Line_Tx) || \
157 ((MODE) == SPI_Direction_1Line_Rx) || \
158 ((MODE) == SPI_Direction_EEPROM_Read))
165 #define IS_SPI_MODE(MODE) (((MODE) == SPI_Mode_Master) || \ argument
166 ((MODE) == SPI_Mode_Slave))
412 #define IS_NSM_DIRECTION_MODE(MODE) (((MODE) == NSM_Direction_Data_Transmit) || \ argument
413 ((MODE) == NSM_Direction_Data_Receive))
424 #define IS_NSM_TRANSFER_MODE(MODE) (((MODE) == NSM_TransferMode_Non_Sequential) || \ argument
425 ((MODE) == NSM_TransferMode_Sequential))
/bsp/ti/c28x/libraries/tms320f28379d/common/source/
A DF2837xD_Dma.c181 DmaRegs.CH1.MODE.bit.PERINTSEL = 1; in DMACH1ModeConfig()
182 DmaRegs.CH1.MODE.bit.PERINTE = perinte; in DMACH1ModeConfig()
183 DmaRegs.CH1.MODE.bit.ONESHOT = oneshot; in DMACH1ModeConfig()
188 DmaRegs.CH1.MODE.bit.CHINTE = chinte; in DMACH1ModeConfig()
326 DmaRegs.CH2.MODE.bit.PERINTSEL = 2; in DMACH2ModeConfig()
333 DmaRegs.CH2.MODE.bit.CHINTE = chinte; in DMACH2ModeConfig()
470 DmaRegs.CH3.MODE.bit.PERINTSEL = 3; in DMACH3ModeConfig()
477 DmaRegs.CH3.MODE.bit.CHINTE = chinte; in DMACH3ModeConfig()
614 DmaRegs.CH4.MODE.bit.PERINTSEL = 4; in DMACH4ModeConfig()
758 DmaRegs.CH5.MODE.bit.PERINTSEL = 5; in DMACH5ModeConfig()
[all …]
/bsp/CME_M7/StdPeriph_Driver/inc/
A Dcmem7_flash.h50 #define IS_FLASH_PROTECT_MODE(MODE) (((MODE) == FLASH_PROTECT_MODE_SW) || \ argument
51 ((MODE) == FLASH_PROTECT_MODE_HW) || \
52 ((MODE) == FLASH_PROTECT_MODE_POWERDOWN) || \
53 ((MODE) == FLASH_PROTECT_MODE_OTP))
110 #define IS_FLASH_READ_MODE(MODE) (((MODE) == FLASH_READ_MODE_NORMAL) || \ argument
111 ((MODE) == FLASH_READ_MODE_FAST) || \
112 ((MODE) == FLASH_READ_MODE_FAST_DUAL) || \
113 … ((MODE) == FLASH_READ_MODE_FAST_QUAD))
/bsp/stm32/libraries/STM32L1xx_HAL/STM32L1xx_HAL_Driver/Inc/
A Dstm32l1xx_hal_gpio.h211 #define IS_GPIO_MODE(MODE) (((MODE) == GPIO_MODE_INPUT) ||\ argument
212 ((MODE) == GPIO_MODE_OUTPUT_PP) ||\
213 ((MODE) == GPIO_MODE_OUTPUT_OD) ||\
214 ((MODE) == GPIO_MODE_AF_PP) ||\
215 ((MODE) == GPIO_MODE_AF_OD) ||\
216 ((MODE) == GPIO_MODE_IT_RISING) ||\
217 ((MODE) == GPIO_MODE_IT_FALLING) ||\
218 ((MODE) == GPIO_MODE_IT_RISING_FALLING) ||\
219 ((MODE) == GPIO_MODE_EVT_RISING) ||\
220 ((MODE) == GPIO_MODE_EVT_FALLING) ||\
[all …]
/bsp/hpmicro/libraries/hpm_sdk/drivers/inc/
A Dhpm_qeov2_drv.h165 …base->WAVE.MODE = (base->WAVE.MODE & ~QEOV2_WAVE_MODE_WAVES_OUTPUT_TYPE_MASK) | QEOV2_WAVE_MODE_WA… in qeo_wave_set_output_type()
176 base->WAVE.MODE &= ~QEOV2_WAVE_MODE_SADDLE_TYPE_MASK; in qeo_wave_set_saddle_type()
178 base->WAVE.MODE |= QEOV2_WAVE_MODE_SADDLE_TYPE_MASK; in qeo_wave_set_saddle_type()
203 base->WAVE.MODE |= QEOV2_WAVE_MODE_VD_VQ_SEL_MASK; in qeo_wave_enable_vd_vq_inject()
205 base->WAVE.MODE &= ~QEOV2_WAVE_MODE_VD_VQ_SEL_MASK; in qeo_wave_enable_vd_vq_inject()
417 base->ABZ.MODE &= ~QEOV2_ABZ_MODE_EN_WDOG_MASK; in qeo_abz_disable_wdog()
457 base->ABZ.MODE |= QEOV2_ABZ_MODE_ABZ_OUTPUT_ENABLE_MASK; in qeo_abz_enable_output()
529 base->PWM.MODE |= QEOV2_PWM_MODE_ENABLE_PWM_MASK; in qeo_pwm_enable_output()
538 base->PWM.MODE &= ~QEOV2_PWM_MODE_ENABLE_PWM_MASK; in qeo_pwm_disable_output()
562 base->PWM.MODE &= ~QEOV2_PWM_MODE_REVISE_UP_DN_MASK; in qeo_pwm_select_phase_table()
[all …]
A Dhpm_qeo_drv.h144 …base->WAVE.MODE = (base->WAVE.MODE & ~QEO_WAVE_MODE_WAVES_OUTPUT_TYPE_MASK) | QEO_WAVE_MODE_WAVES_… in qeo_wave_set_output_type()
155 base->WAVE.MODE &= ~QEO_WAVE_MODE_SADDLE_TYPE_MASK; in qeo_wave_set_saddle_type()
157 base->WAVE.MODE |= QEO_WAVE_MODE_SADDLE_TYPE_MASK; in qeo_wave_set_saddle_type()
185 base->WAVE.MODE |= (1U << (QEO_WAVE_MODE_EN_WAVE0_VD_VQ_INJECT_SHIFT + index)); in qeo_wave_enable_vd_vq_inject()
359 base->ABZ.MODE &= ~QEO_ABZ_MODE_EN_WDOG_MASK; in qeo_abz_disable_wdog()
373 base->ABZ.MODE |= QEO_ABZ_MODE_REVERSE_EDGE_TYPE_MASK; in qeo_abz_config_reverse_edge()
375 base->ABZ.MODE &= ~QEO_ABZ_MODE_REVERSE_EDGE_TYPE_MASK; in qeo_abz_config_reverse_edge()
446 base->PWM.MODE &= ~QEO_PWM_MODE_REVISE_UP_DN_MASK; in qeo_pwm_select_phase_table()
448 base->PWM.MODE |= QEO_PWM_MODE_REVISE_UP_DN_MASK; in qeo_pwm_select_phase_table()
461 base->PWM.MODE |= QEO_PWM_MODE_PWM_ENTER_SAFETY_MODE_MASK; in qeo_pwm_software_enter_safety()
[all …]
/bsp/ht32/libraries/HT32_STD_1xxxx_FWLib/library/HT32F1xxxx_Driver/inc/
A Dht32f1xxxx_ebi.h109 #define IS_EBI_MODE(MODE) ((MODE == EBI_MODE_D8A8) || \ argument
110 (MODE == EBI_MODE_D16A16ALE) || \
111 (MODE == EBI_MODE_D8A24ALE) || \
112 (MODE == EBI_MODE_D16))
194 #define IS_EBI_PAGE_MODE(MODE) ((MODE == EBI_PAGEMODE_ENABLE) || \ argument
195 (MODE == EBI_PAGEMODE_DISABLE))
212 #define IS_EBI_PAGE_HIT_MODE(MODE) ((MODE == EBI_PAGEHITMODE_ADDINC) || \ argument
213 (MODE == EBI_PAGEHITMODE_INTRPAGE))
A Dht32f1xxxx_sdio.h177 #define IS_SDIO_BUS_MODE(MODE) (((MODE) == SDIO_BusMode_NormalSpeed) || \ argument
178 ((MODE) == SDIO_BusMode_HighSpeed))
265 #define IS_SDIO_TRANSFER_MODE(MODE) (((MODE) == SDIO_SingleBlock_Transfer) || \ argument
266 ((MODE) == SDIO_MultiBlock_Transfer) || \
267 ((MODE) == SDIO_SingleBlock_DMA_Transfer) || \
268 ((MODE) == SDIO_MultiBlock_DMA_Transfer))
/bsp/airm2m/air32f103/libraries/AIR32F10xLib/inc/
A Dair32f10x_tim.h254 #define IS_TIM_OC_MODE(MODE) (((MODE) == TIM_OCMode_Timing) || \ argument
259 ((MODE) == TIM_OCMode_PWM2))
260 #define IS_TIM_OCM(MODE) (((MODE) == TIM_OCMode_Timing) || \ argument
261 ((MODE) == TIM_OCMode_Active) || \
263 ((MODE) == TIM_OCMode_Toggle)|| \
264 ((MODE) == TIM_OCMode_PWM1) || \
265 ((MODE) == TIM_OCMode_PWM2) || \
278 #define IS_TIM_OPM_MODE(MODE) (((MODE) == TIM_OPMode_Single) || \ argument
328 #define IS_TIM_COUNTER_MODE(MODE) (((MODE) == TIM_CounterMode_Up) || \ argument
790 #define IS_TIM_ENCODER_MODE(MODE) (((MODE) == TIM_EncoderMode_TI1) || \ argument
[all …]
A Dair32f10x_spi.h110 #define IS_SPI_DIRECTION_MODE(MODE) (((MODE) == SPI_Direction_2Lines_FullDuplex) || \ argument
111 ((MODE) == SPI_Direction_2Lines_RxOnly) || \
112 ((MODE) == SPI_Direction_1Line_Rx) || \
113 ((MODE) == SPI_Direction_1Line_Tx))
124 #define IS_SPI_MODE(MODE) (((MODE) == SPI_Mode_Master) || \ argument
125 ((MODE) == SPI_Mode_Slave))
222 #define IS_I2S_MODE(MODE) (((MODE) == I2S_Mode_SlaveTx) || \ argument
223 ((MODE) == I2S_Mode_SlaveRx) || \
224 ((MODE) == I2S_Mode_MasterTx) || \
225 ((MODE) == I2S_Mode_MasterRx) )
/bsp/ft32/libraries/FT32F0xx/FT32F0xx_Driver/Inc/
A Dft32f0xx_tim.h259 #define IS_TIM_OC_MODE(MODE) (((MODE) == TIM_OCMode_Timing) || \ argument
264 ((MODE) == TIM_OCMode_PWM2))
265 #define IS_TIM_OCM(MODE) (((MODE) == TIM_OCMode_Timing) || \ argument
266 ((MODE) == TIM_OCMode_Active) || \
268 ((MODE) == TIM_OCMode_Toggle)|| \
269 ((MODE) == TIM_OCMode_PWM1) || \
270 ((MODE) == TIM_OCMode_PWM2) || \
283 #define IS_TIM_OPM_MODE(MODE) (((MODE) == TIM_OPMode_Single) || \ argument
335 #define IS_TIM_COUNTER_MODE(MODE) (((MODE) == TIM_CounterMode_Up) || \ argument
796 #define IS_TIM_ENCODER_MODE(MODE) (((MODE) == TIM_EncoderMode_TI1) || \ argument
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/bsp/tkm32F499/Libraries/Hal_lib/inc/
A DHAL_tim.h195 #define IS_TIM_OC_MODE(MODE) (((MODE) == TIM_OCMode_Timing) || \ argument
196 ((MODE) == TIM_OCMode_Active) || \
198 ((MODE) == TIM_OCMode_Toggle)|| \
200 ((MODE) == TIM_OCMode_PWM2))
201 #define IS_TIM_OCM(MODE) (((MODE) == TIM_OCMode_Timing) || \ argument
202 ((MODE) == TIM_OCMode_Active) || \
219 #define IS_TIM_OPM_MODE(MODE) (((MODE) == TIM_OPMode_Single) || \ argument
220 ((MODE) == TIM_OPMode_Repetitive))
271 #define IS_TIM_COUNTER_MODE(MODE) (((MODE) == TIM_CounterMode_Up) || \ argument
732 #define IS_TIM_ENCODER_MODE(MODE) (((MODE) == TIM_EncoderMode_TI1) || \ argument
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/bsp/mm32l07x/Libraries/MM32L0xx/HAL_lib/inc/
A DHAL_tim.h195 #define IS_TIM_OC_MODE(MODE) (((MODE) == TIM_OCMode_Timing) || \ argument
196 ((MODE) == TIM_OCMode_Active) || \
201 #define IS_TIM_OCM(MODE) (((MODE) == TIM_OCMode_Timing) || \ argument
202 ((MODE) == TIM_OCMode_Active) || \
219 #define IS_TIM_OPM_MODE(MODE) (((MODE) == TIM_OPMode_Single) || \ argument
220 ((MODE) == TIM_OPMode_Repetitive))
271 #define IS_TIM_COUNTER_MODE(MODE) (((MODE) == TIM_CounterMode_Up) || \ argument
272 ((MODE) == TIM_CounterMode_Down) || \
732 #define IS_TIM_ENCODER_MODE(MODE) (((MODE) == TIM_EncoderMode_TI1) || \ argument
733 ((MODE) == TIM_EncoderMode_TI2) || \
[all …]
/bsp/hk32/libraries/HK32F0xx_StdPeriph_Driver/inc/
A Dhk32f0xx_tim.h258 #define IS_TIM_OC_MODE(MODE) (((MODE) == TIM_OCMode_Timing) || \ argument
263 ((MODE) == TIM_OCMode_PWM2))
264 #define IS_TIM_OCM(MODE) (((MODE) == TIM_OCMode_Timing) || \ argument
265 ((MODE) == TIM_OCMode_Active) || \
267 ((MODE) == TIM_OCMode_Toggle)|| \
268 ((MODE) == TIM_OCMode_PWM1) || \
269 ((MODE) == TIM_OCMode_PWM2) || \
282 #define IS_TIM_OPM_MODE(MODE) (((MODE) == TIM_OPMode_Single) || \ argument
334 #define IS_TIM_COUNTER_MODE(MODE) (((MODE) == TIM_CounterMode_Up) || \ argument
795 #define IS_TIM_ENCODER_MODE(MODE) (((MODE) == TIM_EncoderMode_TI1) || \ argument
[all …]
/bsp/acm32/acm32f0x0-nucleo/libraries/HAL_Driver/Inc/
A DHAL_CAN.h218 #define IS_CAN_MODE(MODE) (((MODE) == CAN_Mode_Normal) ||\ argument
219 ((MODE) == CAN_Mode_SlefTest))
235 #define IS_CAN_OPERATING_MODE(MODE) (((MODE) == CAN_OperatingMode_Initialization) ||\ argument
236 ((MODE) == CAN_OperatingMode_Normal)|| \
237 ((MODE) == CAN_OperatingMode_Sleep)|| \
238 ((MODE) == CAN_OperatingMode_SelfTest)|| \
239 ((MODE) == CAN_OperatingMode_Listen))
321 #define IS_CAN_FILTER_MODE(MODE) (((MODE) == CAN_FilterMode_Dual) || \ argument
322 ((MODE) == CAN_FilterMode_Single))
/bsp/acm32/acm32f4xx-nucleo/libraries/HAL_Driver/Inc/
A DHAL_CAN.h219 #define IS_CAN_MODE(MODE) (((MODE) == CAN_Mode_Normal) ||\ argument
220 ((MODE) == CAN_Mode_SlefTest))
236 #define IS_CAN_OPERATING_MODE(MODE) (((MODE) == CAN_OperatingMode_Initialization) ||\ argument
237 ((MODE) == CAN_OperatingMode_Normal)|| \
238 ((MODE) == CAN_OperatingMode_Sleep)|| \
239 ((MODE) == CAN_OperatingMode_SelfTest)|| \
240 ((MODE) == CAN_OperatingMode_Listen))
322 #define IS_CAN_FILTER_MODE(MODE) (((MODE) == CAN_FilterMode_Dual) || \ argument
323 ((MODE) == CAN_FilterMode_Single))
/bsp/n32/libraries/N32L43x_Firmware_Library/n32l43x_std_periph_driver/inc/
A Dn32l43x_spi.h137 #define IS_SPI_DIR_MODE(MODE) … argument
138 …(((MODE) == SPI_DIR_DOUBLELINE_FULLDUPLEX) || ((MODE) == SPI_DIR_DOUBLELINE_RONLY) …
139 || ((MODE) == SPI_DIR_SINGLELINE_RX) || ((MODE) == SPI_DIR_SINGLELINE_TX))
150 #define IS_SPI_MODE(MODE) (((MODE) == SPI_MODE_MASTER) || ((MODE) == SPI_MODE_SLAVE)) argument
239 #define IS_I2S_MODE(MODE) … argument
240 …(((MODE) == I2S_MODE_SlAVE_TX) || ((MODE) == I2S_MODE_SlAVE_RX) || ((MODE) == I2S_MODE_MASTER_TX) …
241 || ((MODE) == I2S_MODE_MASTER_RX))
/bsp/n32/libraries/N32WB452_Firmware_Library/n32wb452_std_periph_driver/inc/
A Dn32wb452_spi.h138 #define IS_SPI_DIR_MODE(MODE) … argument
139 …(((MODE) == SPI_DIR_DOUBLELINE_FULLDUPLEX) || ((MODE) == SPI_DIR_DOUBLELINE_RONLY) …
140 || ((MODE) == SPI_DIR_SINGLELINE_RX) || ((MODE) == SPI_DIR_SINGLELINE_TX))
151 #define IS_SPI_MODE(MODE) (((MODE) == SPI_MODE_MASTER) || ((MODE) == SPI_MODE_SLAVE)) argument
240 #define IS_I2S_MODE(MODE) … argument
241 …(((MODE) == I2S_MODE_SlAVE_TX) || ((MODE) == I2S_MODE_SlAVE_RX) || ((MODE) == I2S_MODE_MASTER_TX) …
242 || ((MODE) == I2S_MODE_MASTER_RX))
/bsp/n32/libraries/N32L40x_Firmware_Library/n32l40x_std_periph_driver/inc/
A Dn32l40x_spi.h137 #define IS_SPI_DIR_MODE(MODE) … argument
138 …(((MODE) == SPI_DIR_DOUBLELINE_FULLDUPLEX) || ((MODE) == SPI_DIR_DOUBLELINE_RONLY) …
139 || ((MODE) == SPI_DIR_SINGLELINE_RX) || ((MODE) == SPI_DIR_SINGLELINE_TX))
150 #define IS_SPI_MODE(MODE) (((MODE) == SPI_MODE_MASTER) || ((MODE) == SPI_MODE_SLAVE)) argument
239 #define IS_I2S_MODE(MODE) … argument
240 …(((MODE) == I2S_MODE_SlAVE_TX) || ((MODE) == I2S_MODE_SlAVE_RX) || ((MODE) == I2S_MODE_MASTER_TX) …
241 || ((MODE) == I2S_MODE_MASTER_RX))
/bsp/n32/libraries/N32G4FR_Firmware_Library/n32g4fr_std_periph_driver/inc/
A Dn32g4fr_spi.h138 #define IS_SPI_DIR_MODE(MODE) … argument
139 …(((MODE) == SPI_DIR_DOUBLELINE_FULLDUPLEX) || ((MODE) == SPI_DIR_DOUBLELINE_RONLY) …
140 || ((MODE) == SPI_DIR_SINGLELINE_RX) || ((MODE) == SPI_DIR_SINGLELINE_TX))
151 #define IS_SPI_MODE(MODE) (((MODE) == SPI_MODE_MASTER) || ((MODE) == SPI_MODE_SLAVE)) argument
240 #define IS_I2S_MODE(MODE) … argument
241 …(((MODE) == I2S_MODE_SlAVE_TX) || ((MODE) == I2S_MODE_SlAVE_RX) || ((MODE) == I2S_MODE_MASTER_TX) …
242 || ((MODE) == I2S_MODE_MASTER_RX))
/bsp/n32/libraries/N32G45x_Firmware_Library/n32g45x_std_periph_driver/inc/
A Dn32g45x_spi.h138 #define IS_SPI_DIR_MODE(MODE) … argument
139 …(((MODE) == SPI_DIR_DOUBLELINE_FULLDUPLEX) || ((MODE) == SPI_DIR_DOUBLELINE_RONLY) …
140 || ((MODE) == SPI_DIR_SINGLELINE_RX) || ((MODE) == SPI_DIR_SINGLELINE_TX))
151 #define IS_SPI_MODE(MODE) (((MODE) == SPI_MODE_MASTER) || ((MODE) == SPI_MODE_SLAVE)) argument
240 #define IS_I2S_MODE(MODE) … argument
241 …(((MODE) == I2S_MODE_SlAVE_TX) || ((MODE) == I2S_MODE_SlAVE_RX) || ((MODE) == I2S_MODE_MASTER_TX) …
242 || ((MODE) == I2S_MODE_MASTER_RX))
/bsp/n32/libraries/N32G43x_Firmware_Library/n32g43x_std_periph_driver/inc/
A Dn32g43x_spi.h137 #define IS_SPI_DIR_MODE(MODE) … argument
138 …(((MODE) == SPI_DIR_DOUBLELINE_FULLDUPLEX) || ((MODE) == SPI_DIR_DOUBLELINE_RONLY) …
139 || ((MODE) == SPI_DIR_SINGLELINE_RX) || ((MODE) == SPI_DIR_SINGLELINE_TX))
150 #define IS_SPI_MODE(MODE) (((MODE) == SPI_MODE_MASTER) || ((MODE) == SPI_MODE_SLAVE)) argument
239 #define IS_I2S_MODE(MODE) … argument
240 …(((MODE) == I2S_MODE_SlAVE_TX) || ((MODE) == I2S_MODE_SlAVE_RX) || ((MODE) == I2S_MODE_MASTER_TX) …
241 || ((MODE) == I2S_MODE_MASTER_RX))
/bsp/n32g452xx/Libraries/N32_Std_Driver/n32g45x_std_periph_driver/inc/
A Dn32g45x_spi.h138 #define IS_SPI_DIR_MODE(MODE) … argument
139 …(((MODE) == SPI_DIR_DOUBLELINE_FULLDUPLEX) || ((MODE) == SPI_DIR_DOUBLELINE_RONLY) …
140 || ((MODE) == SPI_DIR_SINGLELINE_RX) || ((MODE) == SPI_DIR_SINGLELINE_TX))
151 #define IS_SPI_MODE(MODE) (((MODE) == SPI_MODE_MASTER) || ((MODE) == SPI_MODE_SLAVE)) argument
240 #define IS_I2S_MODE(MODE) … argument
241 …(((MODE) == I2S_MODE_SlAVE_TX) || ((MODE) == I2S_MODE_SlAVE_RX) || ((MODE) == I2S_MODE_MASTER_TX) …
242 || ((MODE) == I2S_MODE_MASTER_RX))

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