| /bsp/stm32/libraries/STM32L1xx_HAL/STM32L1xx_HAL_Driver/Inc/ |
| A D | stm32l1xx_ll_cortex.h | 152 #define LL_MPU_REGION_NO_ACCESS (0x00U << MPU_RASR_AP_Pos) /*!< No access*/
153 #define LL_MPU_REGION_PRIV_RW (0x01U << MPU_RASR_AP_Pos) /*!< RW privileged (privilege…
154 #define LL_MPU_REGION_PRIV_RW_URO (0x02U << MPU_RASR_AP_Pos) /*!< RW privileged - RO user …
155 #define LL_MPU_REGION_FULL_ACCESS (0x03U << MPU_RASR_AP_Pos) /*!< RW privileged & user (Fu…
156 #define LL_MPU_REGION_PRIV_RO (0x05U << MPU_RASR_AP_Pos) /*!< RO privileged (privilege…
157 #define LL_MPU_REGION_PRIV_RO_URO (0x06U << MPU_RASR_AP_Pos) /*!< RO privileged & user (re…
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| /bsp/efm32/Libraries/emlib/src/ |
| A D | em_mpu.c | 104 (init->accessPermission << MPU_RASR_AP_Pos) | in MPU_ConfigureRegion()
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| /bsp/synwit/libraries/SWM320_CSL/CMSIS/CoreSupport/ |
| A D | core_cm0plus.h | 560 #define MPU_RASR_AP_Pos 24 /*!< MPU … macro
561 #define MPU_RASR_AP_Msk (0x7UL << MPU_RASR_AP_Pos) /*!< MPU …
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| /bsp/efm32/Libraries/CMSIS/Include/ |
| A D | core_cm0plus.h | 516 #define MPU_RASR_AP_Pos 24 /*!< MPU … macro
517 #define MPU_RASR_AP_Msk (0x7UL << MPU_RASR_AP_Pos) /*!< MPU …
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| /bsp/ft32/libraries/FT32F0xx/CMSIS/FT32F0xx/Include/ |
| A D | core_cm0plus.h | 551 #define MPU_RASR_AP_Pos 24 /*!< MPU … macro
552 #define MPU_RASR_AP_Msk (0x7UL << MPU_RASR_AP_Pos) /*!< MPU …
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| /bsp/fujitsu/mb9x/mb9bf618s/CMSIS/Include/ |
| A D | core_sc000.h | 550 #define MPU_RASR_AP_Pos 24 /*!< MPU … macro
551 #define MPU_RASR_AP_Msk (0x7UL << MPU_RASR_AP_Pos) /*!< MPU …
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| A D | core_cm0plus.h | 531 #define MPU_RASR_AP_Pos 24 /*!< MPU … macro
532 #define MPU_RASR_AP_Msk (0x7UL << MPU_RASR_AP_Pos) /*!< MPU …
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| /bsp/CME_M7/CMSIS/CMSIS/Include/ |
| A D | core_sc000.h | 550 #define MPU_RASR_AP_Pos 24 /*!< MPU … macro
551 #define MPU_RASR_AP_Msk (0x7UL << MPU_RASR_AP_Pos) /*!< MPU …
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| A D | core_cm0plus.h | 531 #define MPU_RASR_AP_Pos 24 /*!< MPU … macro
532 #define MPU_RASR_AP_Msk (0x7UL << MPU_RASR_AP_Pos) /*!< MPU …
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| /bsp/mm32l07x/Libraries/CMSIS/CORE/ |
| A D | core_cm0plus.h | 531 #define MPU_RASR_AP_Pos 24 /*!< MPU … macro
532 #define MPU_RASR_AP_Msk (0x7UL << MPU_RASR_AP_Pos) /*!< MPU …
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| A D | core_sc000.h | 550 #define MPU_RASR_AP_Pos 24 /*!< MPU … macro
551 #define MPU_RASR_AP_Msk (0x7UL << MPU_RASR_AP_Pos) /*!< MPU …
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| /bsp/mm32l3xx/Libraries/CMSIS/IAR_CORE/ |
| A D | core_cm0plus.h | 560 #define MPU_RASR_AP_Pos 24 /*!< MPU … macro
561 #define MPU_RASR_AP_Msk (0x7UL << MPU_RASR_AP_Pos) /*!< MPU …
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| /bsp/mm32l07x/Libraries/CMSIS/IAR_CORE/ |
| A D | core_cm0plus.h | 560 #define MPU_RASR_AP_Pos 24 /*!< MPU … macro
561 #define MPU_RASR_AP_Msk (0x7UL << MPU_RASR_AP_Pos) /*!< MPU …
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| /bsp/mm32l3xx/Libraries/CMSIS/KEIL_CORE/ |
| A D | core_cm0plus.h | 531 #define MPU_RASR_AP_Pos 24 /*!< MPU … macro
532 #define MPU_RASR_AP_Msk (0x7UL << MPU_RASR_AP_Pos) /*!< MPU …
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| A D | core_sc000.h | 550 #define MPU_RASR_AP_Pos 24 /*!< MPU … macro
551 #define MPU_RASR_AP_Msk (0x7UL << MPU_RASR_AP_Pos) /*!< MPU …
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| /bsp/hk32/libraries/HK32F0xx_StdPeriph_Driver/CMSIS/Core/ |
| A D | core_cm0plus.h | 531 #define MPU_RASR_AP_Pos 24 /*!< MPU … macro
532 #define MPU_RASR_AP_Msk (0x7UL << MPU_RASR_AP_Pos) /*!< MPU …
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| A D | core_sc000.h | 550 #define MPU_RASR_AP_Pos 24 /*!< MPU … macro
551 #define MPU_RASR_AP_Msk (0x7UL << MPU_RASR_AP_Pos) /*!< MPU …
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| /bsp/nxp/lpc/lpc43xx/Libraries/CMSIS/Include/ |
| A D | core_cm0plus.h | 531 #define MPU_RASR_AP_Pos 24 /*!< MPU … macro
532 #define MPU_RASR_AP_Msk (0x7UL << MPU_RASR_AP_Pos) /*!< MPU …
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| A D | core_sc000.h | 550 #define MPU_RASR_AP_Pos 24 /*!< MPU … macro
551 #define MPU_RASR_AP_Msk (0x7UL << MPU_RASR_AP_Pos) /*!< MPU …
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| /bsp/mm32f103x/Libraries/CMSIS/KEIL_CORE/ |
| A D | core_sc000.h | 537 #define MPU_RASR_AP_Pos 24 /*!< MPU … macro
538 #define MPU_RASR_AP_Msk (0x7UL << MPU_RASR_AP_Pos) /*!< MPU …
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| A D | core_cm0plus.h | 519 #define MPU_RASR_AP_Pos 24 /*!< MPU … macro
520 #define MPU_RASR_AP_Msk (0x7UL << MPU_RASR_AP_Pos) /*!< MPU …
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| /bsp/mm32f103x/Libraries/CMSIS/IAR_CORE/ |
| A D | core_cm0plus.h | 548 #define MPU_RASR_AP_Pos 24 /*!< MPU … macro
549 #define MPU_RASR_AP_Msk (0x7UL << MPU_RASR_AP_Pos) /*!< MPU …
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| /bsp/nv32f100x/lib/inc/ |
| A D | core_cm0plus.h | 560 #define MPU_RASR_AP_Pos 24 /*!< MPU … macro
561 #define MPU_RASR_AP_Msk (0x7UL << MPU_RASR_AP_Pos) /*!< MPU …
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| /bsp/xplorer4330/Libraries/CMSIS/Include/ |
| A D | core_sc000.h | 550 #define MPU_RASR_AP_Pos 24 /*!< MPU … macro
551 #define MPU_RASR_AP_Msk (0x7UL << MPU_RASR_AP_Pos) /*!< MPU …
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| A D | core_cm0plus.h | 531 #define MPU_RASR_AP_Pos 24 /*!< MPU … macro
532 #define MPU_RASR_AP_Msk (0x7UL << MPU_RASR_AP_Pos) /*!< MPU …
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