| /bsp/stm32/libraries/STM32L1xx_HAL/STM32L1xx_HAL_Driver/Inc/ |
| A D | stm32l1xx_ll_cortex.h | 117 #define LL_MPU_REGION_SIZE_32B (0x04U << MPU_RASR_SIZE_Pos) /*!< 32B Size of the MPU pr…
118 #define LL_MPU_REGION_SIZE_64B (0x05U << MPU_RASR_SIZE_Pos) /*!< 64B Size of the MPU pr…
119 #define LL_MPU_REGION_SIZE_128B (0x06U << MPU_RASR_SIZE_Pos) /*!< 128B Size of the MPU p…
122 #define LL_MPU_REGION_SIZE_1KB (0x09U << MPU_RASR_SIZE_Pos) /*!< 1KB Size of the MPU pr…
123 #define LL_MPU_REGION_SIZE_2KB (0x0AU << MPU_RASR_SIZE_Pos) /*!< 2KB Size of the MPU pr…
124 #define LL_MPU_REGION_SIZE_4KB (0x0BU << MPU_RASR_SIZE_Pos) /*!< 4KB Size of the MPU pr…
125 #define LL_MPU_REGION_SIZE_8KB (0x0CU << MPU_RASR_SIZE_Pos) /*!< 8KB Size of the MPU pr…
132 #define LL_MPU_REGION_SIZE_1MB (0x13U << MPU_RASR_SIZE_Pos) /*!< 1MB Size of the MPU pr…
133 #define LL_MPU_REGION_SIZE_2MB (0x14U << MPU_RASR_SIZE_Pos) /*!< 2MB Size of the MPU pr…
134 #define LL_MPU_REGION_SIZE_4MB (0x15U << MPU_RASR_SIZE_Pos) /*!< 4MB Size of the MPU pr…
[all …]
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| /bsp/efm32/Libraries/emlib/src/ |
| A D | em_mpu.c | 110 (init->size << MPU_RASR_SIZE_Pos) | in MPU_ConfigureRegion()
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| /bsp/synwit/libraries/SWM320_CSL/CMSIS/CoreSupport/ |
| A D | core_cm0plus.h | 578 #define MPU_RASR_SIZE_Pos 1 /*!< MPU … macro
579 #define MPU_RASR_SIZE_Msk (0x1FUL << MPU_RASR_SIZE_Pos) /*!< MPU …
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| /bsp/efm32/Libraries/CMSIS/Include/ |
| A D | core_cm0plus.h | 534 #define MPU_RASR_SIZE_Pos 1 /*!< MPU … macro
535 #define MPU_RASR_SIZE_Msk (0x1FUL << MPU_RASR_SIZE_Pos) /*!< MPU …
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| /bsp/ft32/libraries/FT32F0xx/CMSIS/FT32F0xx/Include/ |
| A D | core_cm0plus.h | 569 #define MPU_RASR_SIZE_Pos 1 /*!< MPU … macro
570 #define MPU_RASR_SIZE_Msk (0x1FUL << MPU_RASR_SIZE_Pos) /*!< MPU …
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| /bsp/fujitsu/mb9x/mb9bf618s/CMSIS/Include/ |
| A D | core_sc000.h | 568 #define MPU_RASR_SIZE_Pos 1 /*!< MPU … macro
569 #define MPU_RASR_SIZE_Msk (0x1FUL << MPU_RASR_SIZE_Pos) /*!< MPU …
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| A D | core_cm0plus.h | 549 #define MPU_RASR_SIZE_Pos 1 /*!< MPU … macro
550 #define MPU_RASR_SIZE_Msk (0x1FUL << MPU_RASR_SIZE_Pos) /*!< MPU …
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| /bsp/CME_M7/CMSIS/CMSIS/Include/ |
| A D | core_sc000.h | 568 #define MPU_RASR_SIZE_Pos 1 /*!< MPU … macro
569 #define MPU_RASR_SIZE_Msk (0x1FUL << MPU_RASR_SIZE_Pos) /*!< MPU …
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| A D | core_cm0plus.h | 549 #define MPU_RASR_SIZE_Pos 1 /*!< MPU … macro
550 #define MPU_RASR_SIZE_Msk (0x1FUL << MPU_RASR_SIZE_Pos) /*!< MPU …
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| /bsp/mm32l07x/Libraries/CMSIS/CORE/ |
| A D | core_cm0plus.h | 549 #define MPU_RASR_SIZE_Pos 1 /*!< MPU … macro
550 #define MPU_RASR_SIZE_Msk (0x1FUL << MPU_RASR_SIZE_Pos) /*!< MPU …
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| A D | core_sc000.h | 568 #define MPU_RASR_SIZE_Pos 1 /*!< MPU … macro
569 #define MPU_RASR_SIZE_Msk (0x1FUL << MPU_RASR_SIZE_Pos) /*!< MPU …
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| /bsp/mm32l3xx/Libraries/CMSIS/IAR_CORE/ |
| A D | core_cm0plus.h | 578 #define MPU_RASR_SIZE_Pos 1 /*!< MPU … macro
579 #define MPU_RASR_SIZE_Msk (0x1FUL << MPU_RASR_SIZE_Pos) /*!< MPU …
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| /bsp/mm32l07x/Libraries/CMSIS/IAR_CORE/ |
| A D | core_cm0plus.h | 578 #define MPU_RASR_SIZE_Pos 1 /*!< MPU … macro
579 #define MPU_RASR_SIZE_Msk (0x1FUL << MPU_RASR_SIZE_Pos) /*!< MPU …
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| /bsp/mm32l3xx/Libraries/CMSIS/KEIL_CORE/ |
| A D | core_cm0plus.h | 549 #define MPU_RASR_SIZE_Pos 1 /*!< MPU … macro
550 #define MPU_RASR_SIZE_Msk (0x1FUL << MPU_RASR_SIZE_Pos) /*!< MPU …
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| A D | core_sc000.h | 568 #define MPU_RASR_SIZE_Pos 1 /*!< MPU … macro
569 #define MPU_RASR_SIZE_Msk (0x1FUL << MPU_RASR_SIZE_Pos) /*!< MPU …
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| /bsp/hk32/libraries/HK32F0xx_StdPeriph_Driver/CMSIS/Core/ |
| A D | core_cm0plus.h | 549 #define MPU_RASR_SIZE_Pos 1 /*!< MPU … macro
550 #define MPU_RASR_SIZE_Msk (0x1FUL << MPU_RASR_SIZE_Pos) /*!< MPU …
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| A D | core_sc000.h | 568 #define MPU_RASR_SIZE_Pos 1 /*!< MPU … macro
569 #define MPU_RASR_SIZE_Msk (0x1FUL << MPU_RASR_SIZE_Pos) /*!< MPU …
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| /bsp/nxp/lpc/lpc43xx/Libraries/CMSIS/Include/ |
| A D | core_cm0plus.h | 549 #define MPU_RASR_SIZE_Pos 1 /*!< MPU … macro
550 #define MPU_RASR_SIZE_Msk (0x1FUL << MPU_RASR_SIZE_Pos) /*!< MPU …
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| A D | core_sc000.h | 568 #define MPU_RASR_SIZE_Pos 1 /*!< MPU … macro
569 #define MPU_RASR_SIZE_Msk (0x1FUL << MPU_RASR_SIZE_Pos) /*!< MPU …
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| /bsp/mm32f103x/Libraries/CMSIS/KEIL_CORE/ |
| A D | core_sc000.h | 555 #define MPU_RASR_SIZE_Pos 1 /*!< MPU … macro
556 #define MPU_RASR_SIZE_Msk (0x1FUL << MPU_RASR_SIZE_Pos) /*!< MPU …
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| A D | core_cm0plus.h | 537 #define MPU_RASR_SIZE_Pos 1 /*!< MPU … macro
538 #define MPU_RASR_SIZE_Msk (0x1FUL << MPU_RASR_SIZE_Pos) /*!< MPU …
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| /bsp/mm32f103x/Libraries/CMSIS/IAR_CORE/ |
| A D | core_cm0plus.h | 566 #define MPU_RASR_SIZE_Pos 1 /*!< MPU … macro
567 #define MPU_RASR_SIZE_Msk (0x1FUL << MPU_RASR_SIZE_Pos) /*!< MPU …
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| /bsp/nv32f100x/lib/inc/ |
| A D | core_cm0plus.h | 578 #define MPU_RASR_SIZE_Pos 1 /*!< MPU … macro
579 #define MPU_RASR_SIZE_Msk (0x1FUL << MPU_RASR_SIZE_Pos) /*!< MPU …
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| /bsp/xplorer4330/Libraries/CMSIS/Include/ |
| A D | core_sc000.h | 568 #define MPU_RASR_SIZE_Pos 1 /*!< MPU … macro
569 #define MPU_RASR_SIZE_Msk (0x1FUL << MPU_RASR_SIZE_Pos) /*!< MPU …
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| A D | core_cm0plus.h | 549 #define MPU_RASR_SIZE_Pos 1 /*!< MPU … macro
550 #define MPU_RASR_SIZE_Msk (0x1FUL << MPU_RASR_SIZE_Pos) /*!< MPU …
|