| /bsp/efm32/Libraries/emlib/src/ |
| A D | em_mpu.c | 106 ((init->shareable ? 1 : 0) << MPU_RASR_S_Pos) | in MPU_ConfigureRegion()
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| /bsp/synwit/libraries/SWM320_CSL/CMSIS/CoreSupport/ |
| A D | core_cm0plus.h | 566 #define MPU_RASR_S_Pos 18 /*!< MPU … macro
567 #define MPU_RASR_S_Msk (1UL << MPU_RASR_S_Pos) /*!< MPU …
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| /bsp/efm32/Libraries/CMSIS/Include/ |
| A D | core_cm0plus.h | 522 #define MPU_RASR_S_Pos 18 /*!< MPU … macro
523 #define MPU_RASR_S_Msk (1UL << MPU_RASR_S_Pos) /*!< MPU …
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| /bsp/ft32/libraries/FT32F0xx/CMSIS/FT32F0xx/Include/ |
| A D | core_cm0plus.h | 557 #define MPU_RASR_S_Pos 18 /*!< MPU … macro
558 #define MPU_RASR_S_Msk (1UL << MPU_RASR_S_Pos) /*!< MPU …
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| /bsp/fujitsu/mb9x/mb9bf618s/CMSIS/Include/ |
| A D | core_sc000.h | 556 #define MPU_RASR_S_Pos 18 /*!< MPU … macro
557 #define MPU_RASR_S_Msk (1UL << MPU_RASR_S_Pos) /*!< MPU …
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| A D | core_cm0plus.h | 537 #define MPU_RASR_S_Pos 18 /*!< MPU … macro
538 #define MPU_RASR_S_Msk (1UL << MPU_RASR_S_Pos) /*!< MPU …
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| /bsp/CME_M7/CMSIS/CMSIS/Include/ |
| A D | core_sc000.h | 556 #define MPU_RASR_S_Pos 18 /*!< MPU … macro
557 #define MPU_RASR_S_Msk (1UL << MPU_RASR_S_Pos) /*!< MPU …
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| A D | core_cm0plus.h | 537 #define MPU_RASR_S_Pos 18 /*!< MPU … macro
538 #define MPU_RASR_S_Msk (1UL << MPU_RASR_S_Pos) /*!< MPU …
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| /bsp/mm32l07x/Libraries/CMSIS/CORE/ |
| A D | core_cm0plus.h | 537 #define MPU_RASR_S_Pos 18 /*!< MPU … macro
538 #define MPU_RASR_S_Msk (1UL << MPU_RASR_S_Pos) /*!< MPU …
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| A D | core_sc000.h | 556 #define MPU_RASR_S_Pos 18 /*!< MPU … macro
557 #define MPU_RASR_S_Msk (1UL << MPU_RASR_S_Pos) /*!< MPU …
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| /bsp/mm32l3xx/Libraries/CMSIS/IAR_CORE/ |
| A D | core_cm0plus.h | 566 #define MPU_RASR_S_Pos 18 /*!< MPU … macro
567 #define MPU_RASR_S_Msk (1UL << MPU_RASR_S_Pos) /*!< MPU …
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| /bsp/mm32l07x/Libraries/CMSIS/IAR_CORE/ |
| A D | core_cm0plus.h | 566 #define MPU_RASR_S_Pos 18 /*!< MPU … macro
567 #define MPU_RASR_S_Msk (1UL << MPU_RASR_S_Pos) /*!< MPU …
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| /bsp/mm32l3xx/Libraries/CMSIS/KEIL_CORE/ |
| A D | core_cm0plus.h | 537 #define MPU_RASR_S_Pos 18 /*!< MPU … macro
538 #define MPU_RASR_S_Msk (1UL << MPU_RASR_S_Pos) /*!< MPU …
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| A D | core_sc000.h | 556 #define MPU_RASR_S_Pos 18 /*!< MPU … macro
557 #define MPU_RASR_S_Msk (1UL << MPU_RASR_S_Pos) /*!< MPU …
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| /bsp/hk32/libraries/HK32F0xx_StdPeriph_Driver/CMSIS/Core/ |
| A D | core_cm0plus.h | 537 #define MPU_RASR_S_Pos 18 /*!< MPU … macro
538 #define MPU_RASR_S_Msk (1UL << MPU_RASR_S_Pos) /*!< MPU …
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| A D | core_sc000.h | 556 #define MPU_RASR_S_Pos 18 /*!< MPU … macro
557 #define MPU_RASR_S_Msk (1UL << MPU_RASR_S_Pos) /*!< MPU …
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| /bsp/nxp/lpc/lpc43xx/Libraries/CMSIS/Include/ |
| A D | core_cm0plus.h | 537 #define MPU_RASR_S_Pos 18 /*!< MPU … macro
538 #define MPU_RASR_S_Msk (1UL << MPU_RASR_S_Pos) /*!< MPU …
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| A D | core_sc000.h | 556 #define MPU_RASR_S_Pos 18 /*!< MPU … macro
557 #define MPU_RASR_S_Msk (1UL << MPU_RASR_S_Pos) /*!< MPU …
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| /bsp/mm32f103x/Libraries/CMSIS/KEIL_CORE/ |
| A D | core_sc000.h | 543 #define MPU_RASR_S_Pos 18 /*!< MPU … macro
544 #define MPU_RASR_S_Msk (1UL << MPU_RASR_S_Pos) /*!< MPU …
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| A D | core_cm0plus.h | 525 #define MPU_RASR_S_Pos 18 /*!< MPU … macro
526 #define MPU_RASR_S_Msk (1UL << MPU_RASR_S_Pos) /*!< MPU …
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| /bsp/mm32f103x/Libraries/CMSIS/IAR_CORE/ |
| A D | core_cm0plus.h | 554 #define MPU_RASR_S_Pos 18 /*!< MPU … macro
555 #define MPU_RASR_S_Msk (1UL << MPU_RASR_S_Pos) /*!< MPU …
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| /bsp/nv32f100x/lib/inc/ |
| A D | core_cm0plus.h | 566 #define MPU_RASR_S_Pos 18 /*!< MPU … macro
567 #define MPU_RASR_S_Msk (1UL << MPU_RASR_S_Pos) /*!< MPU …
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| /bsp/xplorer4330/Libraries/CMSIS/Include/ |
| A D | core_sc000.h | 556 #define MPU_RASR_S_Pos 18 /*!< MPU … macro
557 #define MPU_RASR_S_Msk (1UL << MPU_RASR_S_Pos) /*!< MPU …
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| A D | core_cm0plus.h | 537 #define MPU_RASR_S_Pos 18 /*!< MPU … macro
538 #define MPU_RASR_S_Msk (1UL << MPU_RASR_S_Pos) /*!< MPU …
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| /bsp/samd21/sam_d2x_asflib/CMSIS/Include/ |
| A D | core_cm0plus.h | 566 #define MPU_RASR_S_Pos 18 /*!< MPU … macro
567 #define MPU_RASR_S_Msk (1UL << MPU_RASR_S_Pos) /*!< MPU …
|