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Searched refs:MSR (Results 1 – 25 of 66) sorted by relevance

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/bsp/airm2m/air32f103/libraries/AIR32F10xLib/src/
A Dair32f10x_can.c152 if ((CANx->MSR & CAN_MSR_INAK) != CAN_MSR_INAK) in CAN_Init()
781 if ((CANx->MSR & CAN_MODE_MASK) != 0) in CAN_OperatingModeRequest()
865 if((CANx->MSR & CAN_MSR_SLAK) != CAN_MSR_SLAK) in CAN_WakeUp()
1144 CANx->MSR = (uint32_t)(flagtmp); in CAN_ClearFlag()
1303 CANx->MSR = CAN_MSR_WKUI; in CAN_ClearITPendingBit()
1307 CANx->MSR = CAN_MSR_SLAKI; in CAN_ClearITPendingBit()
1311 CANx->MSR = CAN_MSR_ERRI; in CAN_ClearITPendingBit()
1317 CANx->MSR = CAN_MSR_ERRI; in CAN_ClearITPendingBit()
1323 CANx->MSR = CAN_MSR_ERRI; in CAN_ClearITPendingBit()
1331 CANx->MSR = CAN_MSR_ERRI; in CAN_ClearITPendingBit()
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/bsp/allwinner_tina/libcpu/
A Dcontext_gcc.S20 MSR CPSR_c, R1
28 MSR CPSR, R0
45 MSR SPSR_cxsf, R4
56 MSR SPSR_cxsf, R4
/bsp/nxp/mcx/mcxn/Libraries/drivers/
A Ddrv_pwm.c88 ct->MSR[p_channel] = period_ns * 1000 / pwm->counter_period_ps; in mcx_pwm_period_set()
101 uint32_t new_mr = ct->MR[i] * ct->MSR[p_channel] / ct->MR[p_channel]; in mcx_pwm_period_set()
102 ct->MSR[i] = new_mr; in mcx_pwm_period_set()
152 ct->MSR[channel] = ct->MR[p_channel] - pulse_ns * 1000 / pwm->counter_period_ps; in mcx_pwm_pulse_set()
158 while (ct->MR[channel] != ct->MSR[channel]) in mcx_pwm_pulse_set()
/bsp/raspberry-pico/RP2040/libcpu/
A Dcontext_gcc.S52 MSR PRIMASK, R0
176 MSR PSP, R1 /* update stack pointer */
180 MSR PRIMASK, R2
229 MSR MSP, R0
/bsp/microchip/samd51-adafruit-metro-m4/bsp/hri/
A Dhri_cmcc_d51.h143 return (((Cmcc *)hw)->MSR.reg & CMCC_MSR_EVENT_CNT(mask)) >> CMCC_MSR_EVENT_CNT_Pos; in hri_cmcc_get_MSR_EVENT_CNT_bf()
148 return (((Cmcc *)hw)->MSR.reg & CMCC_MSR_EVENT_CNT_Msk) >> CMCC_MSR_EVENT_CNT_Pos; in hri_cmcc_read_MSR_EVENT_CNT_bf()
154 tmp = ((Cmcc *)hw)->MSR.reg; in hri_cmcc_get_MSR_reg()
161 return ((Cmcc *)hw)->MSR.reg; in hri_cmcc_read_MSR_reg()
/bsp/microchip/samd51-seeed-wio-terminal/bsp/hri/
A Dhri_cmcc_d51.h143 return (((Cmcc *)hw)->MSR.reg & CMCC_MSR_EVENT_CNT(mask)) >> CMCC_MSR_EVENT_CNT_Pos; in hri_cmcc_get_MSR_EVENT_CNT_bf()
148 return (((Cmcc *)hw)->MSR.reg & CMCC_MSR_EVENT_CNT_Msk) >> CMCC_MSR_EVENT_CNT_Pos; in hri_cmcc_read_MSR_EVENT_CNT_bf()
154 tmp = ((Cmcc *)hw)->MSR.reg; in hri_cmcc_get_MSR_reg()
161 return ((Cmcc *)hw)->MSR.reg; in hri_cmcc_read_MSR_reg()
/bsp/microchip/same54/bsp/hri/
A Dhri_cmcc_e54.h143 return (((Cmcc *)hw)->MSR.reg & CMCC_MSR_EVENT_CNT(mask)) >> CMCC_MSR_EVENT_CNT_Pos; in hri_cmcc_get_MSR_EVENT_CNT_bf()
148 return (((Cmcc *)hw)->MSR.reg & CMCC_MSR_EVENT_CNT_Msk) >> CMCC_MSR_EVENT_CNT_Pos; in hri_cmcc_read_MSR_EVENT_CNT_bf()
154 tmp = ((Cmcc *)hw)->MSR.reg; in hri_cmcc_get_MSR_reg()
161 return ((Cmcc *)hw)->MSR.reg; in hri_cmcc_read_MSR_reg()
/bsp/rv32m1_vega/rv32m1_sdk_riscv/devices/RV32M1/drivers/
A Dfsl_lpit.h260 return base->MSR; in LPIT_GetStatusFlags()
273 base->MSR = mask; in LPIT_ClearStatusFlags()
A Dfsl_lpi2c.h516 return base->MSR; in LPI2C_MasterGetStatusFlags()
541 base->MSR = statusMask; in LPI2C_MasterClearStatusFlags()
700 return (base->MSR & LPI2C_MSR_BBF_MASK) >> LPI2C_MSR_BBF_SHIFT; in LPI2C_MasterGetBusIdleState()
/bsp/stm32/stm32h563-st-nucleo/
A Dcontext_rvds.lst88 53 00000008 F380 8810 MSR PRIMASK, r0
162 103 0000003C F382 8810 MSR PRIMASK, r2 ; if r1 == 0x00, do
281 173 000000B0 F384 880B MSR psplim, r4 ; psplim = r4
282 174 000000B4 F385 8814 MSR control, r5 ; control = r5
324 199 000000E2 F381 8809 MSR psp, r1 ; update stack poin
334 202 000000E8 F382 8810 MSR PRIMASK, r2
356 222 000000FA F382 8814 MSR CONTROL, r2 ; write-back
386 251 0000012A F380 8808 MSR msp, r0
448 294 0000016A F380 8809 MSR psp, r0 ; update stack poin
452 297 00000170 F380 8808 MSR msp, r0 ; update stack poin
/bsp/thead-smart/drivers/
A Dck_usart.h82 __IM uint32_t MSR; /* Offset: 0x018 (R/ ) Modem state register */ member
/bsp/ck802/libraries/common/usart/
A Ddw_usart.h98 __IM uint32_t MSR; /* Offset: 0x018 (R/ ) Modem state register */ member
/bsp/hpmicro/libraries/hpm_sdk/drivers/inc/
A Dhpm_uart_drv.h369 return ptr->MSR; in uart_get_modem_status()
405 return ((ptr->MSR & mask) != 0U) ? true : false; in uart_check_modem_status()
/bsp/wch/risc-v/Libraries/ch56x_drivers/
A Dch56x_uart.h244 union _uart_lsr MSR; member
A Dch56x_uart.c307 uxreg->MSR; in _uart_isr_common()
/bsp/ck802/drivers/
A Dsoc.h126 __IM uint32_t MSR; /* Offset: 0x018 (R/ ) Modem state register */
/bsp/nxp/lpc/lpc178x/drivers/
A Dlpc177x_8x_uart.c259 tmp = ((LPC_UART1_TypeDef *)UARTx)->MSR; in UART_Init()
1209 return ((UARTx->MSR) & UART1_MSR_BITMASK); in UART_FullModemGetStatus()
/bsp/rockchip/common/rk_hal/lib/hal/src/
A Dhal_uart.c230 return pReg->MSR; in HAL_UART_GetMsr()
/bsp/microchip/same54/bsp/include/component/
A Dcmcc.h351 …__I CMCC_MSR_Type MSR; /**< \brief Offset: 0x34 (R/ 32) Cache Monitor Status… member
/bsp/microchip/samd51-seeed-wio-terminal/bsp/samd51a/include/component/
A Dcmcc.h351 …__I CMCC_MSR_Type MSR; /**< \brief Offset: 0x34 (R/ 32) Cache Monitor Status… member
/bsp/microchip/samd51-adafruit-metro-m4/bsp/samd51a/include/component/
A Dcmcc.h351 …__I CMCC_MSR_Type MSR; /**< \brief Offset: 0x34 (R/ 32) Cache Monitor Status… member
/bsp/nrf5x/
A DREADME.md244 ;MSR PRIMASK, r0
/bsp/ft32/libraries/FT32F0xx/CMSIS/FT32F0xx/source/arm/
A Dstartup_ft32f030x6.s105 MSR MSP, R0
A Dstartup_ft32f030x8.s105 MSR MSP, R0
A Dstartup_ft32f072xb.s105 MSR MSP, R0

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