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Searched refs:NVMCTRL_CTRLB_RWS_Pos (Results 1 – 8 of 8) sorted by relevance

/bsp/samd21/sam_d2x_asflib/sam0/utils/cmsis/samd20/include/component/
A Dnvmctrl.h131 #define NVMCTRL_CTRLB_RWS_Pos 1 /**< \brief (NVMCTRL_CTRLB) NVM Read Wait States */ macro
132 #define NVMCTRL_CTRLB_RWS_Msk (0xFul << NVMCTRL_CTRLB_RWS_Pos)
133 #define NVMCTRL_CTRLB_RWS(value) ((NVMCTRL_CTRLB_RWS_Msk & ((value) << NVMCTRL_CTRLB_RWS_Pos)))
137 #define NVMCTRL_CTRLB_RWS_SINGLE (NVMCTRL_CTRLB_RWS_SINGLE_Val << NVMCTRL_CTRLB_RWS_Pos)
138 #define NVMCTRL_CTRLB_RWS_HALF (NVMCTRL_CTRLB_RWS_HALF_Val << NVMCTRL_CTRLB_RWS_Pos)
139 #define NVMCTRL_CTRLB_RWS_DUAL (NVMCTRL_CTRLB_RWS_DUAL_Val << NVMCTRL_CTRLB_RWS_Pos)
/bsp/microchip/samc21/bsp/samc21/include/component/
A Dnvmctrl.h118 #define NVMCTRL_CTRLB_RWS_Pos 1 /**< \brief (NVMCTRL_CTRLB) NVM Read Wait States */ macro
119 #define NVMCTRL_CTRLB_RWS_Msk (_U_(0xF) << NVMCTRL_CTRLB_RWS_Pos)
120 #define NVMCTRL_CTRLB_RWS(value) (NVMCTRL_CTRLB_RWS_Msk & ((value) << NVMCTRL_CTRLB_RWS_Pos))
124 #define NVMCTRL_CTRLB_RWS_SINGLE (NVMCTRL_CTRLB_RWS_SINGLE_Val << NVMCTRL_CTRLB_RWS_Pos)
125 #define NVMCTRL_CTRLB_RWS_HALF (NVMCTRL_CTRLB_RWS_HALF_Val << NVMCTRL_CTRLB_RWS_Pos)
126 #define NVMCTRL_CTRLB_RWS_DUAL (NVMCTRL_CTRLB_RWS_DUAL_Val << NVMCTRL_CTRLB_RWS_Pos)
/bsp/samd21/sam_d2x_asflib/sam0/utils/cmsis/samd21/include/component/
A Dnvmctrl.h132 #define NVMCTRL_CTRLB_RWS_Pos 1 /**< \brief (NVMCTRL_CTRLB) NVM Read Wait States */ macro
133 #define NVMCTRL_CTRLB_RWS_Msk (0xFul << NVMCTRL_CTRLB_RWS_Pos)
134 #define NVMCTRL_CTRLB_RWS(value) (NVMCTRL_CTRLB_RWS_Msk & ((value) << NVMCTRL_CTRLB_RWS_Pos))
138 #define NVMCTRL_CTRLB_RWS_SINGLE (NVMCTRL_CTRLB_RWS_SINGLE_Val << NVMCTRL_CTRLB_RWS_Pos)
139 #define NVMCTRL_CTRLB_RWS_HALF (NVMCTRL_CTRLB_RWS_HALF_Val << NVMCTRL_CTRLB_RWS_Pos)
140 #define NVMCTRL_CTRLB_RWS_DUAL (NVMCTRL_CTRLB_RWS_DUAL_Val << NVMCTRL_CTRLB_RWS_Pos)
/bsp/microchip/saml10/bsp/include/component/
A Dnvmctrl.h111 #define NVMCTRL_CTRLB_RWS_Pos 1 /**< (NV… macro
112 #define NVMCTRL_CTRLB_RWS_Msk (_U_(0xF) << NVMCTRL_CTRLB_RWS_Pos) /**< (NV…
113 …ne NVMCTRL_CTRLB_RWS(value) (NVMCTRL_CTRLB_RWS_Msk & ((value) << NVMCTRL_CTRLB_RWS_Pos))
/bsp/samd21/sam_d2x_asflib/sam0/drivers/system/clock/clock_samd20/
A Dclock_feature.h1288 ((uint32_t)wait_states << NVMCTRL_CTRLB_RWS_Pos)); in system_flash_set_waitstates()
/bsp/samd21/sam_d2x_asflib/sam0/drivers/system/clock/clock_samd21_r21_da_ha1/
A Dclock_feature.h1290 ((uint32_t)wait_states << NVMCTRL_CTRLB_RWS_Pos)); in system_flash_set_waitstates()
/bsp/microchip/samc21/bsp/hri/
A Dhri_nvmctrl_c21.h417 tmp = (tmp & NVMCTRL_CTRLB_RWS(mask)) >> NVMCTRL_CTRLB_RWS_Pos; in hri_nvmctrl_get_CTRLB_RWS_bf()
450 tmp = (tmp & NVMCTRL_CTRLB_RWS_Msk) >> NVMCTRL_CTRLB_RWS_Pos; in hri_nvmctrl_read_CTRLB_RWS_bf()
/bsp/microchip/saml10/bsp/hri/
A Dhri_nvmctrl_l10.h554 tmp = (tmp & NVMCTRL_CTRLB_RWS(mask)) >> NVMCTRL_CTRLB_RWS_Pos; in hri_nvmctrl_get_CTRLB_RWS_bf()
587 tmp = (tmp & NVMCTRL_CTRLB_RWS_Msk) >> NVMCTRL_CTRLB_RWS_Pos; in hri_nvmctrl_read_CTRLB_RWS_bf()

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