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Searched refs:NVMCTRL_INTENSET_READY_Pos (Results 1 – 4 of 4) sorted by relevance

/bsp/samd21/sam_d2x_asflib/sam0/utils/cmsis/samd20/include/component/
A Dnvmctrl.h239 #define NVMCTRL_INTENSET_READY_Pos 0 /**< \brief (NVMCTRL_INTENSET) NVM Ready Interrupt… macro
240 #define NVMCTRL_INTENSET_READY (0x1ul << NVMCTRL_INTENSET_READY_Pos)
/bsp/microchip/samc21/bsp/samc21/include/component/
A Dnvmctrl.h231 #define NVMCTRL_INTENSET_READY_Pos 0 /**< \brief (NVMCTRL_INTENSET) NVM Ready Interrupt… macro
232 #define NVMCTRL_INTENSET_READY (_U_(0x1) << NVMCTRL_INTENSET_READY_Pos)
/bsp/samd21/sam_d2x_asflib/sam0/utils/cmsis/samd21/include/component/
A Dnvmctrl.h244 #define NVMCTRL_INTENSET_READY_Pos 0 /**< \brief (NVMCTRL_INTENSET) NVM Ready Interrupt… macro
245 #define NVMCTRL_INTENSET_READY (0x1ul << NVMCTRL_INTENSET_READY_Pos)
/bsp/microchip/samc21/bsp/hri/
A Dhri_nvmctrl_c21.h130 return (((Nvmctrl *)hw)->INTENSET.reg & NVMCTRL_INTENSET_READY) >> NVMCTRL_INTENSET_READY_Pos; in hri_nvmctrl_get_INTEN_READY_bit()

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