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Searched refs:Nvmctrl (Results 1 – 25 of 100) sorted by relevance

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/bsp/microchip/samd51-adafruit-metro-m4/bsp/hri/
A Dhri_nvmctrl_d51.h628 tmp = ((Nvmctrl *)hw)->PARAM.reg; in hri_nvmctrl_get_PARAM_reg()
859 tmp = ((Nvmctrl *)hw)->CTRLA.reg; in hri_nvmctrl_get_CTRLA_AUTOWS_bit()
868 tmp = ((Nvmctrl *)hw)->CTRLA.reg; in hri_nvmctrl_write_CTRLA_AUTOWS_bit()
871 ((Nvmctrl *)hw)->CTRLA.reg = tmp; in hri_nvmctrl_write_CTRLA_AUTOWS_bit()
899 tmp = ((Nvmctrl *)hw)->CTRLA.reg; in hri_nvmctrl_get_CTRLA_SUSPEN_bit()
908 tmp = ((Nvmctrl *)hw)->CTRLA.reg; in hri_nvmctrl_write_CTRLA_SUSPEN_bit()
1284 tmp = ((Nvmctrl *)hw)->ADDR.reg; in hri_nvmctrl_get_ADDR_ADDR_bf()
1293 tmp = ((Nvmctrl *)hw)->ADDR.reg; in hri_nvmctrl_write_ADDR_ADDR_bf()
1296 ((Nvmctrl *)hw)->ADDR.reg = tmp; in hri_nvmctrl_write_ADDR_ADDR_bf()
1317 tmp = ((Nvmctrl *)hw)->ADDR.reg; in hri_nvmctrl_read_ADDR_ADDR_bf()
[all …]
/bsp/microchip/same54/bsp/hri/
A Dhri_nvmctrl_e54.h628 tmp = ((Nvmctrl *)hw)->PARAM.reg; in hri_nvmctrl_get_PARAM_reg()
859 tmp = ((Nvmctrl *)hw)->CTRLA.reg; in hri_nvmctrl_get_CTRLA_AUTOWS_bit()
868 tmp = ((Nvmctrl *)hw)->CTRLA.reg; in hri_nvmctrl_write_CTRLA_AUTOWS_bit()
871 ((Nvmctrl *)hw)->CTRLA.reg = tmp; in hri_nvmctrl_write_CTRLA_AUTOWS_bit()
899 tmp = ((Nvmctrl *)hw)->CTRLA.reg; in hri_nvmctrl_get_CTRLA_SUSPEN_bit()
908 tmp = ((Nvmctrl *)hw)->CTRLA.reg; in hri_nvmctrl_write_CTRLA_SUSPEN_bit()
1284 tmp = ((Nvmctrl *)hw)->ADDR.reg; in hri_nvmctrl_get_ADDR_ADDR_bf()
1293 tmp = ((Nvmctrl *)hw)->ADDR.reg; in hri_nvmctrl_write_ADDR_ADDR_bf()
1296 ((Nvmctrl *)hw)->ADDR.reg = tmp; in hri_nvmctrl_write_ADDR_ADDR_bf()
1317 tmp = ((Nvmctrl *)hw)->ADDR.reg; in hri_nvmctrl_read_ADDR_ADDR_bf()
[all …]
/bsp/microchip/samd51-seeed-wio-terminal/bsp/hri/
A Dhri_nvmctrl_d51.h628 tmp = ((Nvmctrl *)hw)->PARAM.reg; in hri_nvmctrl_get_PARAM_reg()
859 tmp = ((Nvmctrl *)hw)->CTRLA.reg; in hri_nvmctrl_get_CTRLA_AUTOWS_bit()
868 tmp = ((Nvmctrl *)hw)->CTRLA.reg; in hri_nvmctrl_write_CTRLA_AUTOWS_bit()
871 ((Nvmctrl *)hw)->CTRLA.reg = tmp; in hri_nvmctrl_write_CTRLA_AUTOWS_bit()
899 tmp = ((Nvmctrl *)hw)->CTRLA.reg; in hri_nvmctrl_get_CTRLA_SUSPEN_bit()
908 tmp = ((Nvmctrl *)hw)->CTRLA.reg; in hri_nvmctrl_write_CTRLA_SUSPEN_bit()
1284 tmp = ((Nvmctrl *)hw)->ADDR.reg; in hri_nvmctrl_get_ADDR_ADDR_bf()
1293 tmp = ((Nvmctrl *)hw)->ADDR.reg; in hri_nvmctrl_write_ADDR_ADDR_bf()
1296 ((Nvmctrl *)hw)->ADDR.reg = tmp; in hri_nvmctrl_write_ADDR_ADDR_bf()
1317 tmp = ((Nvmctrl *)hw)->ADDR.reg; in hri_nvmctrl_read_ADDR_ADDR_bf()
[all …]
/bsp/microchip/saml10/bsp/hri/
A Dhri_nvmctrl_l10.h433 tmp = ((Nvmctrl *)hw)->CTRLB.reg; in hri_nvmctrl_get_CTRLB_FWUP_bit()
442 tmp = ((Nvmctrl *)hw)->CTRLB.reg; in hri_nvmctrl_write_CTRLB_FWUP_bit()
445 ((Nvmctrl *)hw)->CTRLB.reg = tmp; in hri_nvmctrl_write_CTRLB_FWUP_bit()
473 tmp = ((Nvmctrl *)hw)->CTRLB.reg; in hri_nvmctrl_get_CTRLB_CACHEDIS_bit()
482 tmp = ((Nvmctrl *)hw)->CTRLB.reg; in hri_nvmctrl_write_CTRLB_CACHEDIS_bit()
485 ((Nvmctrl *)hw)->CTRLB.reg = tmp; in hri_nvmctrl_write_CTRLB_CACHEDIS_bit()
942 tmp = ((Nvmctrl *)hw)->ADDR.reg; in hri_nvmctrl_get_ADDR_AOFFSET_bf()
951 tmp = ((Nvmctrl *)hw)->ADDR.reg; in hri_nvmctrl_write_ADDR_AOFFSET_bf()
954 ((Nvmctrl *)hw)->ADDR.reg = tmp; in hri_nvmctrl_write_ADDR_AOFFSET_bf()
975 tmp = ((Nvmctrl *)hw)->ADDR.reg; in hri_nvmctrl_read_ADDR_AOFFSET_bf()
[all …]
/bsp/microchip/samc21/bsp/hri/
A Dhri_nvmctrl_c21.h108 tmp = ((Nvmctrl *)hw)->INTFLAG.reg; in hri_nvmctrl_get_INTFLAG_reg()
239 tmp = ((Nvmctrl *)hw)->CTRLA.reg; in hri_nvmctrl_get_CTRLA_CMD_bf()
248 tmp = ((Nvmctrl *)hw)->CTRLA.reg; in hri_nvmctrl_write_CTRLA_CMD_bf()
251 ((Nvmctrl *)hw)->CTRLA.reg = tmp; in hri_nvmctrl_write_CTRLA_CMD_bf()
272 tmp = ((Nvmctrl *)hw)->CTRLA.reg; in hri_nvmctrl_read_CTRLA_CMD_bf()
287 tmp = ((Nvmctrl *)hw)->CTRLA.reg; in hri_nvmctrl_get_CTRLA_CMDEX_bf()
296 tmp = ((Nvmctrl *)hw)->CTRLA.reg; in hri_nvmctrl_write_CTRLA_CMDEX_bf()
299 ((Nvmctrl *)hw)->CTRLA.reg = tmp; in hri_nvmctrl_write_CTRLA_CMDEX_bf()
320 tmp = ((Nvmctrl *)hw)->CTRLA.reg; in hri_nvmctrl_read_CTRLA_CMDEX_bf()
335 tmp = ((Nvmctrl *)hw)->CTRLA.reg; in hri_nvmctrl_get_CTRLA_reg()
[all …]
/bsp/samd21/sam_d2x_asflib/sam0/drivers/nvm/
A Dnvm.c110 Nvmctrl *const nvm_module = NVMCTRL; in nvm_set_config()
214 Nvmctrl *const nvm_module = NVMCTRL; in nvm_execute_command()
464 Nvmctrl *const nvm_module = NVMCTRL; in nvm_write_buffer()
570 Nvmctrl *const nvm_module = NVMCTRL; in nvm_read_buffer()
646 Nvmctrl *const nvm_module = NVMCTRL; in nvm_erase_row()
700 Nvmctrl *const nvm_module = NVMCTRL; in nvm_get_parameters()
775 Nvmctrl *const nvm_module = NVMCTRL; in nvm_is_page_locked()
A Dnvm.h751 Nvmctrl *const nvm_module = NVMCTRL; in nvm_is_ready()
818 Nvmctrl *const nvm_module = NVMCTRL; in nvm_get_error()
/bsp/samd21/sam_d2x_asflib/sam0/utils/cmsis/samd20/include/
A Dsamd20e14.h403 #define NVMCTRL ((Nvmctrl *)0x41004000UL) /**< \brief (NVMCTRL) APB Base Address */
A Dsamd20e15.h403 #define NVMCTRL ((Nvmctrl *)0x41004000UL) /**< \brief (NVMCTRL) APB Base Address */
A Dsamd20g14.h410 #define NVMCTRL ((Nvmctrl *)0x41004000UL) /**< \brief (NVMCTRL) APB Base Address */
A Dsamd20g15.h410 #define NVMCTRL ((Nvmctrl *)0x41004000UL) /**< \brief (NVMCTRL) APB Base Address */
A Dsamd20g16.h410 #define NVMCTRL ((Nvmctrl *)0x41004000UL) /**< \brief (NVMCTRL) APB Base Address */
A Dsamd20g17.h410 #define NVMCTRL ((Nvmctrl *)0x41004000UL) /**< \brief (NVMCTRL) APB Base Address */
A Dsamd20g17u.h410 #define NVMCTRL ((Nvmctrl *)0x41004000UL) /**< \brief (NVMCTRL) APB Base Address */
A Dsamd20g18.h410 #define NVMCTRL ((Nvmctrl *)0x41004000UL) /**< \brief (NVMCTRL) APB Base Address */
A Dsamd20g18u.h410 #define NVMCTRL ((Nvmctrl *)0x41004000UL) /**< \brief (NVMCTRL) APB Base Address */
A Dsamd20e16.h403 #define NVMCTRL ((Nvmctrl *)0x41004000UL) /**< \brief (NVMCTRL) APB Base Address */
A Dsamd20e17.h403 #define NVMCTRL ((Nvmctrl *)0x41004000UL) /**< \brief (NVMCTRL) APB Base Address */
A Dsamd20e18.h403 #define NVMCTRL ((Nvmctrl *)0x41004000UL) /**< \brief (NVMCTRL) APB Base Address */
A Dsamd20j14.h423 #define NVMCTRL ((Nvmctrl *)0x41004000UL) /**< \brief (NVMCTRL) APB Base Address */
A Dsamd20j15.h423 #define NVMCTRL ((Nvmctrl *)0x41004000UL) /**< \brief (NVMCTRL) APB Base Address */
A Dsamd20j16.h423 #define NVMCTRL ((Nvmctrl *)0x41004000UL) /**< \brief (NVMCTRL) APB Base Address */
A Dsamd20j17.h423 #define NVMCTRL ((Nvmctrl *)0x41004000UL) /**< \brief (NVMCTRL) APB Base Address */
A Dsamd20j18.h423 #define NVMCTRL ((Nvmctrl *)0x41004000UL) /**< \brief (NVMCTRL) APB Base Address */
/bsp/samd21/sam_d2x_asflib/sam0/utils/cmsis/samd21/include/
A Dsamd21e15a.h447 #define NVMCTRL ((Nvmctrl *)0x41004000UL) /**< \brief (NVMCTRL) APB Base Address */

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