| /bsp/allwinner/libraries/sunxi-hal/hal/source/thermal/ |
| A D | hal_thermal.c | 21 …THS_DBG("OFFSET:%d[0x%x], SCALE:%d[0x%x], reg:%d[0x%x]\n", OFFSET, OFFSET, SCALE, SCALE, reg, reg); in hal_ths_reg2temp()
23 return (reg + OFFSET) * SCALE; in hal_ths_reg2temp()
|
| /bsp/airm2m/air105/libraries/HAL_Driver/Inc/ |
| A D | misc.h | 80 #define IS_NVIC_OFFSET(OFFSET) ((OFFSET) < 0x000FFFFF) argument
|
| /bsp/n32/libraries/N32WB452_Firmware_Library/n32wb452_std_periph_driver/inc/ |
| A D | misc.h | 173 #define IS_NVIC_OFFSET(OFFSET) ((OFFSET) < 0x000FFFFF) argument
|
| /bsp/mm32l3xx/Libraries/MM32L3xx/HAL_lib/inc/ |
| A D | HAL_misc.h | 112 #define IS_NVIC_OFFSET(OFFSET) ((OFFSET) < 0x0007FFFF) argument
|
| /bsp/tkm32F499/Libraries/Hal_lib/inc/ |
| A D | HAL_misc.h | 112 #define IS_NVIC_OFFSET(OFFSET) ((OFFSET) < 0x0007FFFF) argument
|
| /bsp/n32/libraries/N32G4FR_Firmware_Library/n32g4fr_std_periph_driver/inc/ |
| A D | misc.h | 173 #define IS_NVIC_OFFSET(OFFSET) ((OFFSET) < 0x000FFFFF) argument
|
| /bsp/n32/libraries/N32G45x_Firmware_Library/n32g45x_std_periph_driver/inc/ |
| A D | misc.h | 173 #define IS_NVIC_OFFSET(OFFSET) ((OFFSET) < 0x000FFFFF) argument
|
| /bsp/mm32f103x/Libraries/MM32F103/HAL_lib/inc/ |
| A D | HAL_misc.h | 112 #define IS_NVIC_OFFSET(OFFSET) ((OFFSET) < 0x0007FFFF) argument
|
| /bsp/airm2m/air32f103/libraries/AIR32F10xLib/inc/ |
| A D | misc.h | 140 #define IS_NVIC_OFFSET(OFFSET) ((OFFSET) < 0x000FFFFF) argument
|
| /bsp/n32/libraries/N32L43x_Firmware_Library/n32l43x_std_periph_driver/inc/ |
| A D | misc.h | 173 #define IS_NVIC_OFFSET(OFFSET) ((OFFSET) < 0x000FFFFF) argument
|
| /bsp/n32/libraries/N32L40x_Firmware_Library/n32l40x_std_periph_driver/inc/ |
| A D | misc.h | 173 #define IS_NVIC_OFFSET(OFFSET) ((OFFSET) < 0x000FFFFF) argument
|
| /bsp/n32/libraries/N32G43x_Firmware_Library/n32g43x_std_periph_driver/inc/ |
| A D | misc.h | 172 #define IS_NVIC_OFFSET(OFFSET) ((OFFSET) < 0x000FFFFF) argument
|
| /bsp/n32g452xx/Libraries/N32_Std_Driver/n32g45x_std_periph_driver/inc/ |
| A D | misc.h | 173 #define IS_NVIC_OFFSET(OFFSET) ((OFFSET) < 0x000FFFFF) argument
|
| /bsp/ht32/libraries/HT32_STD_5xxxx_FWLib/library/HT32F5xxxx_Driver/inc/ |
| A D | ht32_cm0plus_misc.h | 60 #define IS_NVIC_OFFSET(OFFSET) (OFFSET < 0x0001FFFF) argument
|
| /bsp/ht32/libraries/HT32_STD_1xxxx_FWLib/library/HT32F1xxxx_Driver/inc/ |
| A D | ht32_cm3_misc.h | 60 #define IS_NVIC_OFFSET(OFFSET) (OFFSET < 0x0001FFFF) argument
|
| /bsp/CME_M7/StdPeriph_Driver/inc/ |
| A D | cmem7_misc.h | 140 #define IS_NVIC_OFFSET(OFFSET) ((OFFSET) < 0x000FFFFF) argument
|
| /bsp/allwinner/libraries/libos/include/misc/ |
| A D | fb.h | 170 } OFFSET; /* coordinate (x, y) */ typedef
174 typedef OFFSET __pos_t;
|
| /bsp/microchip/samc21/bsp/hri/ |
| A D | hri_tsens_c21.h | 1080 ((Tsens *)hw)->OFFSET.reg |= TSENS_OFFSET_OFFSETC(mask); in hri_tsens_set_OFFSET_OFFSETC_bf()
1087 tmp = ((Tsens *)hw)->OFFSET.reg; in hri_tsens_get_OFFSET_OFFSETC_bf()
1096 tmp = ((Tsens *)hw)->OFFSET.reg; in hri_tsens_write_OFFSET_OFFSETC_bf()
1099 ((Tsens *)hw)->OFFSET.reg = tmp; in hri_tsens_write_OFFSET_OFFSETC_bf()
1120 tmp = ((Tsens *)hw)->OFFSET.reg; in hri_tsens_read_OFFSET_OFFSETC_bf()
1128 ((Tsens *)hw)->OFFSET.reg |= mask; in hri_tsens_set_OFFSET_reg()
1135 tmp = ((Tsens *)hw)->OFFSET.reg; in hri_tsens_get_OFFSET_reg()
1143 ((Tsens *)hw)->OFFSET.reg = data; in hri_tsens_write_OFFSET_reg()
1150 ((Tsens *)hw)->OFFSET.reg &= ~mask; in hri_tsens_clear_OFFSET_reg()
1157 ((Tsens *)hw)->OFFSET.reg ^= mask; in hri_tsens_toggle_OFFSET_reg()
[all …]
|
| /bsp/efm32/ |
| A D | board.c | 35 #define IS_NVIC_OFFSET(OFFSET) ((OFFSET) < 0x000FFFFF) argument
|
| /bsp/allwinner/libraries/sunxi-hal/include/hal/ |
| A D | sunxi_hal_thermal.h | 52 #define OFFSET -2794 macro
|
| /bsp/efm32/Libraries/Device/EnergyMicro/EFM32G/Include/ |
| A D | efm32g880f128.h | 398 #define SET_BIT_FIELD(REG, MASK, VALUE, OFFSET) \ argument
399 REG = ((REG) &~(MASK)) | (((VALUE) << (OFFSET)) & (MASK));
|
| A D | efm32g880f32.h | 398 #define SET_BIT_FIELD(REG, MASK, VALUE, OFFSET) \ argument
399 REG = ((REG) &~(MASK)) | (((VALUE) << (OFFSET)) & (MASK));
|
| A D | efm32g880f64.h | 398 #define SET_BIT_FIELD(REG, MASK, VALUE, OFFSET) \ argument
399 REG = ((REG) &~(MASK)) | (((VALUE) << (OFFSET)) & (MASK));
|
| A D | efm32g890f128.h | 398 #define SET_BIT_FIELD(REG, MASK, VALUE, OFFSET) \ argument
399 REG = ((REG) &~(MASK)) | (((VALUE) << (OFFSET)) & (MASK));
|
| A D | efm32g890f32.h | 398 #define SET_BIT_FIELD(REG, MASK, VALUE, OFFSET) \ argument
399 REG = ((REG) &~(MASK)) | (((VALUE) << (OFFSET)) & (MASK));
|