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/bsp/allwinner/libraries/sunxi-hal/hal/source/g2d_rcq/
A Dg2d_bld.c71 OUT: in bld_in_set()
104 OUT: in bld_ck_para_set()
123 OUT: in bld_bk_set()
146 OUT: in bld_out_setting()
163 OUT: in bld_set_rop_ctrl()
190 OUT: in bld_cs_set()
249 OUT: in bld_csc_reg_set()
304 OUT: in bld_porter_duff()
334 OUT: in bld_rcq_setup()
429 OUT: in bld_rop2_set()
[all …]
A Dg2d_mixer.c132 OUT: in g2d_bsp_maskblt()
187 OUT: in g2d_fillrectangle()
290 OUT: in g2d_bsp_bld()
386 OUT: in g2d_bsp_bitblt()
426 OUT: in g2d_split_mem()
582 OUT: in g2d_mixer_mem_setup()
630 OUT: in frame_mem_setup()
690 OUT: in g2d_mixer_frame_apply()
773 OUT: in g2d_mixer_frame_setup()
928 OUT: in create_mixer_task()
[all …]
A Dg2d_ovl_u.c29 goto OUT; in g2d_ovl_u_fc_set()
37 OUT: in g2d_ovl_u_fc_set()
51 goto OUT; in g2d_uilayer_set()
85 OUT: in g2d_uilayer_set()
96 goto OUT; in g2d_uilayer_overlay_set()
104 OUT: in g2d_uilayer_overlay_set()
116 goto OUT; in ovl_u_rcq_setup()
126 goto OUT; in ovl_u_rcq_setup()
140 goto OUT; in ovl_u_rcq_setup()
162 OUT: in ovl_u_rcq_setup()
[all …]
A Dg2d_ovl_v.c29 goto OUT; in g2d_ovl_v_calc_coarse()
122 OUT: in g2d_ovl_v_calc_coarse()
135 goto OUT; in g2d_ovl_v_fc_set()
142 OUT: in g2d_ovl_v_fc_set()
161 goto OUT; in g2d_vlayer_set()
245 OUT: in g2d_vlayer_set()
256 goto OUT; in g2d_vlayer_overlay_set()
264 OUT: in g2d_vlayer_overlay_set()
276 goto OUT; in ovl_v_rcq_setup()
286 goto OUT; in ovl_v_rcq_setup()
[all …]
A Dg2d.c229 goto OUT; in g2d_image_check()
242 goto OUT; in g2d_image_check()
282 OUT: in g2d_image_check()
425 goto OUT; in g2d_clock_enable()
432 goto OUT; in g2d_clock_enable()
439 goto OUT; in g2d_clock_enable()
448 goto OUT; in g2d_clock_enable()
452 OUT: in g2d_clock_enable()
466 goto OUT; in g2d_clock_disable()
474 goto OUT; in g2d_clock_disable()
[all …]
A Dg2d_wb.c28 goto OUT; in wb_rcq_setup()
38 goto OUT; in wb_rcq_setup()
47 OUT: in wb_rcq_setup()
113 goto OUT; in g2d_wb_set()
169 OUT: in g2d_wb_set()
A Dg2d_rotate.c121 goto OUT; in g2d_rotate_set_para()
123 goto OUT; in g2d_rotate_set_para()
280 OUT: in g2d_rotate_set_para()
361 goto OUT; in g2d_lbc_rot_set_para()
363 goto OUT; in g2d_lbc_rot_set_para()
368 goto OUT; in g2d_lbc_rot_set_para()
373 goto OUT; in g2d_lbc_rot_set_para()
570 OUT: in g2d_lbc_rot_set_para()
A Dg2d_scal.c169 goto OUT; in scal_rcq_setup()
179 goto OUT; in scal_rcq_setup()
188 OUT: in scal_rcq_setup()
285 goto OUT; in g2d_vsu_para_set()
477 OUT: in g2d_vsu_para_set()
/bsp/allwinner/libraries/sunxi-hal/hal/source/disp2/soc/
A Ddisp_board_config.c42 goto OUT; in disp_get_board_config()
55 OUT: in disp_get_board_config()
69 goto OUT; in disp_get_property_value()
94 OUT: in disp_get_property_value()
/bsp/allwinner/libraries/sunxi-hal/hal/source/disp2/disp/de/
A Ddisp_display.c1675 goto OUT; in bsp_disp_lcd_tcon_enable()
1707 OUT: in bsp_disp_lcd_tcon_enable()
1721 goto OUT; in bsp_disp_lcd_tcon_disable()
1748 OUT: in bsp_disp_lcd_tcon_disable()
1825 goto OUT; in bsp_disp_lcd_dsi_mode_switch()
1839 OUT: in bsp_disp_lcd_dsi_mode_switch()
1866 OUT: in bsp_disp_lcd_dsi_clk_enable()
1895 OUT: in bsp_disp_lcd_dsi_dcs_wr()
1924 OUT: in bsp_disp_lcd_dsi_gen_wr()
1939 OUT: in bsp_disp_lcd_dsi_gen_short_read()
[all …]
A Ddisp_tv.c194 goto OUT; in cal_real_frame_period()
200 goto OUT; in cal_real_frame_period()
205 goto OUT; in cal_real_frame_period()
219 goto OUT; in cal_real_frame_period()
244 OUT: in cal_real_frame_period()
A Ddisp_hdmi.c372 goto OUT; in cal_real_frame_period()
379 goto OUT; in cal_real_frame_period()
384 goto OUT; in cal_real_frame_period()
391 goto OUT; in cal_real_frame_period()
408 OUT: in cal_real_frame_period()
/bsp/microchip/samd51-adafruit-metro-m4/bsp/hal/documentation/
A Dusb_device_async.rst160 to IN and OUT endpoint. E.g., for endpoint 1, the endpoint IN has address 0x81
161 and endpoint OUT has address 0x01. Thus, the possible supported endpoint
163 as control endpoint instead of dedicated IN and OUT endpoints).
174 * For OUT endpoint (receive from host) the data pointer must be aligned, and
182 In addition, to support unaligned OUT packet and IN packet inside flash, the
184 * For OUT endpoints, if the cache is allocated, it's possible to pass unaligned
/bsp/microchip/samd51-seeed-wio-terminal/bsp/hal/documentation/
A Dusb_device_async.rst160 to IN and OUT endpoint. E.g., for endpoint 1, the endpoint IN has address 0x81
161 and endpoint OUT has address 0x01. Thus, the possible supported endpoint
163 as control endpoint instead of dedicated IN and OUT endpoints).
174 * For OUT endpoint (receive from host) the data pointer must be aligned, and
182 In addition, to support unaligned OUT packet and IN packet inside flash, the
184 * For OUT endpoints, if the cache is allocated, it's possible to pass unaligned
/bsp/wch/risc-v/Libraries/ch56x_drivers/
A Dch56x_gpio.c130 BITS_SET(px->OUT, bitpos); in gpio_pin_mode()
147 BITS_CLR(px->OUT, bitpos); in gpio_pin_write()
149 BITS_SET(px->OUT, bitpos); in gpio_pin_write()
A Dch56x_gpio.h139 uint32_t OUT; // reset value is 0 member
/bsp/samd21/sam_d2x_asflib/sam0/drivers/port/
A Dport.h370 return (port->OUT.reg & mask); in port_group_get_output_level()
494 return (port_base->OUT.reg & pin_mask); in port_pin_get_output_level()
/bsp/allwinner/libraries/sunxi-hal/hal/test/disp2/
A Ddisp_mem.c144 goto OUT; in disp_mem()
185 OUT: in disp_mem()
/bsp/samd21/sam_d2x_asflib/sam0/utils/cmsis/samd21/include/component/
A Dport.h132 uint32_t OUT:32; /*!< bit: 0..31 Port Data Output Value */ member
371 __IO PORT_OUT_Type OUT; /**< \brief Offset: 0x10 (R/W 32) Data Output Value */ member
/bsp/samd21/sam_d2x_asflib/sam0/utils/cmsis/samd20/include/component/
A Dport.h135 uint32_t OUT:32; /*!< bit: 0..31 Port Data Output Value */ member
374 __IO PORT_OUT_Type OUT; /**< \brief Offset: 0x10 (R/W 32) Data Output Value */ member
/bsp/allwinner/libraries/sunxi-hal/hal/source/disp2/disp/
A Ddisp_sys_intf.c494 goto OUT; in disp_sys_power_enable()
506 OUT: in disp_sys_power_enable()
521 goto OUT; in disp_sys_power_disable()
532 OUT: in disp_sys_power_disable()
/bsp/microchip/same54/bsp/include/component/
A Dport.h118 uint32_t OUT:32; /*!< bit: 0..31 PORT Data Output Value */ member
391 __IO PORT_OUT_Type OUT; /**< \brief Offset: 0x10 (R/W 32) Data Output Value */ member
/bsp/microchip/samd51-adafruit-metro-m4/bsp/samd51a/include/component/
A Dport.h118 uint32_t OUT:32; /*!< bit: 0..31 PORT Data Output Value */ member
391 __IO PORT_OUT_Type OUT; /**< \brief Offset: 0x10 (R/W 32) Data Output Value */ member
/bsp/microchip/samd51-seeed-wio-terminal/bsp/samd51a/include/component/
A Dport.h118 uint32_t OUT:32; /*!< bit: 0..31 PORT Data Output Value */ member
391 __IO PORT_OUT_Type OUT; /**< \brief Offset: 0x10 (R/W 32) Data Output Value */ member
/bsp/rockchip/common/rk_hal/
A DLICENSE26 OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE

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