P2_5 (reference) in projects: bsp - OpenGrok search results

Searched refs:P2_5 (Results 1 – 9 of 9) sorted by relevance

/bsp/nxp/lpc/lpc178x/drivers/
A D	drv_glcd.c	`205 LPC_IOCON->P2_5 = 0x07; // HSYNC in GLCD_Init()`
/bsp/Infineon/psoc6-evaluationkit-062S2/libs/TARGET_RTT-062S2/config/GeneratedSource/
A D	cycfg_pins.h	`74 #define CYBSP_WIFI_SDIO_CLK (P2_5)`
/bsp/Infineon/psoc6-cy8cproto-062S3-4343W/libs/TARGET_CY8CPROTO-062S3-4343W/config/GeneratedSource/
A D	cycfg_pins.h	`102 #define CYBSP_WIFI_SDIO_CLK (P2_5)`
/bsp/Infineon/psoc6-cy8ckit-062s4/libs/TARGET_CY8CKIT-062S4/config/GeneratedSource/
A D	cycfg_pins.h	`116 #define CYBSP_LED8 (P2_5)`
/bsp/Infineon/psoc6-cy8ckit-062-WIFI-BT/libs/TARGET_CY8CKIT-062-WIFI-BT/config/GeneratedSource/
A D	cycfg_pins.h	`167 #define CYBSP_WIFI_SDIO_CLK (P2_5)`
/bsp/Infineon/psoc6-cy8ckit-062S2-43012/libs/TARGET_CY8CKIT-062S2-43012/config/GeneratedSource/
A D	cycfg_pins.h	`186 #define CYBSP_WIFI_SDIO_CLK (P2_5)`
/bsp/Infineon/libraries/templates/PSOC62/libs/TARGET_CY8CKIT-062S2-43012/config/GeneratedSource/
A D	cycfg_pins.h	`186 #define CYBSP_WIFI_SDIO_CLK (P2_5)`
/bsp/Infineon/psoc6-evaluationkit-062S2/board/
A D	Kconfig	`336 int "Enable SDCARD clk pin,default:P2_5 --> 21"`
/bsp/m16c62p/drivers/
A D	iom16c62p.h	`1663 unsigned char P2_5:1;/* Port P25 register */ member`

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