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Searched refs:P3_5 (Results 1 – 6 of 6) sorted by relevance

/bsp/nxp/lpc/lpc408x/drivers/
A Ddrv_sdram.c27 LPC_IOCON->P3_5 = (1 << 0 | 0 << 3 | 0 << 5 | 1 << 9); /* D5 @ P3.5 */ in sdram_gpio_config()
/bsp/nxp/lpc/lpc178x/drivers/
A Dsdram.c98 LPC_IOCON->P3_5 = (1<<0 | 0<<3 | 0<<5 | 1<<9); /* D5 @ P3.5 */ in EMC_GPIO_Init()
/bsp/Infineon/psoc6-cy8ckit-062-WIFI-BT/libs/TARGET_CY8CKIT-062-WIFI-BT/config/GeneratedSource/
A Dcycfg_pins.h175 #define CYBSP_BT_HOST_WAKE (P3_5)
/bsp/Infineon/psoc6-cy8ckit-062S2-43012/libs/TARGET_CY8CKIT-062S2-43012/config/GeneratedSource/
A Dcycfg_pins.h193 #define CYBSP_BT_DEVICE_WAKE (P3_5)
/bsp/Infineon/libraries/templates/PSOC62/libs/TARGET_CY8CKIT-062S2-43012/config/GeneratedSource/
A Dcycfg_pins.h193 #define CYBSP_BT_DEVICE_WAKE (P3_5)
/bsp/m16c62p/drivers/
A Diom16c62p.h1680 unsigned char P3_5:1;/* Port P35 register */ member

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