Searched refs:P7_0 (Results 1 – 10 of 10) sorted by relevance
170 #define CYBSP_CSD_SLD0_HAL_PORT_PIN P7_0172 #define CYBSP_CSD_SLD0 P7_0
231 .rx_pin = P7_0, \
200 #define CYBSP_CSD_BTN0_HAL_PORT_PIN P7_0202 #define CYBSP_CSD_BTN0 P7_0
262 #define CYBSP_QSPI_SS (P7_0)
121 #define CYBSP_TRACE_CLK (P7_0)
235 #define CYBSP_TRACE_CLK (P7_0)
264 #define CYBSP_TRACE_CLK (P7_0)
269 #define CYBSP_TRACE_CLK (P7_0)
1815 unsigned char P7_0:1;/* Port P70 register */ member
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