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Searched refs:PERIPH_BASE (Results 1 – 25 of 138) sorted by relevance

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/bsp/fm33lc026/libraries/FM33LC0xx_FL_Driver/CMSIS/Include/
A Dfm33lg0xx.h980 #define PERIPH_BASE (( uint32_t)0x40000000) macro
989 #define FLASH_R_BASE (PERIPH_BASE +0x00001000)
990 #define PMU_BASE (PERIPH_BASE +0x00002000)
991 #define VREFP_BASE (PERIPH_BASE +0x0000203C)
992 #define VREF_BASE (PERIPH_BASE +0x0001A400)
993 #define VAO_BASE (PERIPH_BASE +0x0001F000)
994 #define CDIF_BASE (PERIPH_BASE +0x0001E000)
995 #define RMU_BASE (PERIPH_BASE +0x00002800)
996 #define IWDT_BASE (PERIPH_BASE +0x00011400)
997 #define WWDT_BASE (PERIPH_BASE +0x00011800)
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A Dfm33lc0xx.h681 #define PERIPH_BASE 0x40000000UL macro
688 #define DBG_BASE (PERIPH_BASE + 0x00000000UL)
689 #define PMU_BASE (PERIPH_BASE + 0x00000100UL)
690 #define RCC_BASE (PERIPH_BASE + 0x00000200UL)
691 #define DMA_BASE (PERIPH_BASE + 0x00000400UL)
692 #define GPIOA_BASE (PERIPH_BASE + 0x00000C00UL)
693 #define GPIOB_BASE (PERIPH_BASE + 0x00000C40UL)
694 #define GPIOC_BASE (PERIPH_BASE + 0x00000C80UL)
695 #define GPIOD_BASE (PERIPH_BASE + 0x00000CC0UL)
696 #define GPIO_COMMON_BASE (PERIPH_BASE + 0x00000D00UL)
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/bsp/fm33lc026/libraries/FM/FM33xx/Include/
A Dfm33lg0xx.h980 #define PERIPH_BASE (( uint32_t)0x40000000) macro
989 #define FLASH_R_BASE (PERIPH_BASE +0x00001000)
990 #define PMU_BASE (PERIPH_BASE +0x00002000)
991 #define VREFP_BASE (PERIPH_BASE +0x0000203C)
992 #define VREF_BASE (PERIPH_BASE +0x0001A400)
993 #define VAO_BASE (PERIPH_BASE +0x0001F000)
994 #define CDIF_BASE (PERIPH_BASE +0x0001E000)
995 #define RMU_BASE (PERIPH_BASE +0x00002800)
996 #define IWDT_BASE (PERIPH_BASE +0x00011400)
997 #define WWDT_BASE (PERIPH_BASE +0x00011800)
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A Dfm33lc0xx.h680 #define PERIPH_BASE 0x40000000UL macro
687 #define DBG_BASE (PERIPH_BASE + 0x00000000UL)
688 #define PMU_BASE (PERIPH_BASE + 0x00000100UL)
689 #define RCC_BASE (PERIPH_BASE + 0x00000200UL)
690 #define DMA_BASE (PERIPH_BASE + 0x00000400UL)
691 #define GPIOA_BASE (PERIPH_BASE + 0x00000C00UL)
692 #define GPIOB_BASE (PERIPH_BASE + 0x00000C40UL)
693 #define GPIOC_BASE (PERIPH_BASE + 0x00000C80UL)
694 #define GPIOD_BASE (PERIPH_BASE + 0x00000CC0UL)
695 #define GPIO_COMMON_BASE (PERIPH_BASE + 0x00000D00UL)
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/bsp/mm32f327x/Libraries/MM32F327x/Include/
A Dreg_common.h170 #define PERIPH_BASE (0x40000000U) ///< Peripheral bas… macro
178 #define APB1PERIPH_BASE (PERIPH_BASE + 0x00000000)
179 #define APB2PERIPH_BASE (PERIPH_BASE + 0x00010000)
180 #define AHBPERIPH_BASE (PERIPH_BASE + 0x00020000)
181 #define AHB2PERIPH_BASE (PERIPH_BASE + 0x10000000)
182 #define AHB3PERIPH_BASE (PERIPH_BASE + 0x20000000)
/bsp/airm2m/air32f103/libraries/AIR32F10xLib/src/
A Dair32f10x_rcc_ex.c9 #define RCC_OFFSET (RCC_BASE - PERIPH_BASE)
137 #define BDCR_ADDRESS (PERIPH_BASE + BDCR_OFFSET)
A Dair32f10x_wwdg.c27 #define WWDG_OFFSET (WWDG_BASE - PERIPH_BASE)
/bsp/wch/arm/Libraries/CH32F10x_StdPeriph_Driver/StdPeriph_Driver/src/
A Dch32f10x_wwdg.c13 #define WWDG_OFFSET (WWDG_BASE - PERIPH_BASE)
A Dch32f10x_pwr.c12 #define PWR_OFFSET (PWR_BASE - PERIPH_BASE)
/bsp/tkm32F499/Libraries/Hal_lib/src/
A DHAL_wwdg.c50 #define WWDG_OFFSET (WWDG_BASE - PERIPH_BASE)
/bsp/mm32l07x/Libraries/MM32L0xx/HAL_lib/src/
A DHAL_wwdg.c47 #define WWDG_OFFSET (WWDG_BASE - PERIPH_BASE)
/bsp/mm32l3xx/Libraries/MM32L3xx/HAL_lib/src/
A DHAL_wwdg.c47 #define WWDG_OFFSET (WWDG_BASE - PERIPH_BASE)
/bsp/mm32f103x/Libraries/MM32F103/HAL_lib/src/
A DHAL_wwdg.c47 #define WWDG_OFFSET (WWDG_BASE - PERIPH_BASE)
/bsp/n32/libraries/N32L43x_Firmware_Library/n32l43x_std_periph_driver/src/
A Dn32l43x_wwdg.c60 #define WWDG_OFFADDR (WWDG_BASE - PERIPH_BASE)
/bsp/n32/libraries/N32G4FR_Firmware_Library/n32g4fr_std_periph_driver/src/
A Dn32g4fr_wwdg.c60 #define WWDG_OFFADDR (WWDG_BASE - PERIPH_BASE)
A Dn32g4fr_bkp.c59 #define BKP_OFFSET (BKP_BASE - PERIPH_BASE)
/bsp/n32/libraries/N32L40x_Firmware_Library/n32l40x_std_periph_driver/src/
A Dn32l40x_wwdg.c60 #define WWDG_OFFADDR (WWDG_BASE - PERIPH_BASE)
/bsp/n32/libraries/N32G45x_Firmware_Library/n32g45x_std_periph_driver/src/
A Dn32g45x_wwdg.c60 #define WWDG_OFFADDR (WWDG_BASE - PERIPH_BASE)
A Dn32g45x_bkp.c59 #define BKP_OFFSET (BKP_BASE - PERIPH_BASE)
/bsp/n32/libraries/N32WB452_Firmware_Library/n32wb452_std_periph_driver/src/
A Dn32wb452_wwdg.c60 #define WWDG_OFFADDR (WWDG_BASE - PERIPH_BASE)
A Dn32wb452_bkp.c59 #define BKP_OFFSET (BKP_BASE - PERIPH_BASE)
/bsp/n32/libraries/N32G43x_Firmware_Library/n32g43x_std_periph_driver/src/
A Dn32g43x_wwdg.c60 #define WWDG_OFFADDR (WWDG_BASE - PERIPH_BASE)
/bsp/n32g452xx/Libraries/N32_Std_Driver/n32g45x_std_periph_driver/src/
A Dn32g45x_wwdg.c60 #define WWDG_OFFADDR (WWDG_BASE - PERIPH_BASE)
A Dn32g45x_bkp.c59 #define BKP_OFFSET (BKP_BASE - PERIPH_BASE)
/bsp/acm32/acm32f0x0-nucleo/libraries/Device/
A DACM32F0x0.h602 #define PERIPH_BASE (0x40000000UL) macro
604 #define APB1PERIPH_BASE (PERIPH_BASE)
605 #define APB2PERIPH_BASE (PERIPH_BASE + 0x10000UL)
606 #define AHB1PERIPH_BASE (PERIPH_BASE + 0x20000UL)
607 #define AHB2PERIPH_BASE (PERIPH_BASE + 0x30000UL)

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