Searched refs:PHY_BASIC_CONTROL_REG (Results 1 – 12 of 12) sorted by relevance
| /bsp/hpmicro/hpm6300evk/board/ |
| A D | eth_phy_port.h | 45 #define PHY_BASIC_CONTROL_REG (0x00U) macro
73 #define PHY0_REG_LIST PHY_BASIC_CONTROL_REG,\
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| /bsp/nxp/mcx/mcxn/Libraries/drivers/ |
| A D | drv_eth.c | 41 #define PHY_BASIC_CONTROL_REG 0x00U macro
316 ENET_MDIOWrite(EXAMPLE_ENET_BASE, phy_addr, PHY_BASIC_CONTROL_REG, PHY_RESET_MASK); in phy_monitor_thread_entry()
318 ENET_MDIOWrite(EXAMPLE_ENET_BASE, phy_addr, PHY_BASIC_CONTROL_REG, PHY_AUTO_NEGOTIATION_MASK); in phy_monitor_thread_entry()
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| /bsp/hc32/libraries/hc32_drivers/ |
| A D | drv_eth.h | 28 #define PHY_BASIC_CONTROL_REG 0x00U macro
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| A D | drv_eth.c | 503 ETH_PHY_WriteReg(ETH_PHY_ADDR, PHY_BASIC_CONTROL_REG, PHY_RESET_MASK); in hc32_phy_monitor_thread()
505 ETH_PHY_WriteReg(ETH_PHY_ADDR, PHY_BASIC_CONTROL_REG, PHY_AUTO_NEGOTIATION_MASK); in hc32_phy_monitor_thread()
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| /bsp/stm32/stm32h750-artpi/board/port/ |
| A D | drv_eth.c | 178 …if(HAL_ETH_WritePHYRegister(&EthHandle, PHY_ADDR, PHY_BASIC_CONTROL_REG, PHY_RESET_MASK) == HAL_OK) in rt_stm32_eth_init()
189 … if(HAL_ETH_ReadPHYRegister(&EthHandle, PHY_ADDR, PHY_BASIC_CONTROL_REG, ®value) != HAL_OK) in rt_stm32_eth_init()
204 if(HAL_ETH_ReadPHYRegister(&EthHandle, PHY_ADDR, PHY_BASIC_CONTROL_REG, ®value) == HAL_OK) in rt_stm32_eth_init()
207 HAL_ETH_WritePHYRegister(&EthHandle, PHY_ADDR, PHY_BASIC_CONTROL_REG, regvalue); in rt_stm32_eth_init()
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| A D | drv_eth.h | 21 #define PHY_BASIC_CONTROL_REG 0x00U macro
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| /bsp/Infineon/libraries/HAL_Drivers/ |
| A D | drv_eth.h | 21 #define PHY_BASIC_CONTROL_REG 0x00U macro
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| /bsp/at32/libraries/rt_drivers/ |
| A D | drv_emac.h | 23 #define PHY_BASIC_CONTROL_REG 0x00U macro
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| A D | drv_emac.c | 928 emac_phy_register_write(phy_addr, PHY_BASIC_CONTROL_REG, PHY_RESET_MASK); in phy_monitor_thread_entry()
930 emac_phy_register_write(phy_addr, PHY_BASIC_CONTROL_REG, PHY_AUTO_NEGOTIATION_MASK); in phy_monitor_thread_entry()
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| /bsp/renesas/libraries/HAL_Drivers/ |
| A D | drv_eth.h | 20 #define PHY_BASIC_CONTROL_REG 0x00U macro
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| /bsp/stm32/libraries/HAL_Drivers/drivers/ |
| A D | drv_eth.h | 20 #define PHY_BASIC_CONTROL_REG 0x00U macro
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| A D | drv_eth.c | 527 HAL_ETH_WritePHYRegister(&EthHandle, PHY_BASIC_CONTROL_REG, PHY_RESET_MASK); in phy_monitor_thread_entry()
529 HAL_ETH_WritePHYRegister(&EthHandle, PHY_BASIC_CONTROL_REG, PHY_AUTO_NEGOTIATION_MASK); in phy_monitor_thread_entry()
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