Home
last modified time | relevance | path

Searched refs:PHY_BCTL_LOOP_MASK (Results 1 – 5 of 5) sorted by relevance

/bsp/nxp/imx/imxrt/libraries/drivers/
A Ddrv_rtl8211f.c45 #define PHY_BCTL_LOOP_MASK 0x4000U /*!< The PHY loop bit mask. */ macro
350 regValue = PHY_BCTL_SPEED1_MASK | PHY_BCTL_DUPLEX_MASK | PHY_BCTL_LOOP_MASK; in rt_phy_loopback()
354 regValue = PHY_BCTL_SPEED0_MASK | PHY_BCTL_DUPLEX_MASK | PHY_BCTL_LOOP_MASK; in rt_phy_loopback()
358 regValue = PHY_BCTL_DUPLEX_MASK | PHY_BCTL_LOOP_MASK; in rt_phy_loopback()
368 regValue &= ~PHY_BCTL_LOOP_MASK; in rt_phy_loopback()
A Ddrv_ksz8081.c42 #define PHY_BCTL_LOOP_MASK 0x4000U /*!< The PHY loop bit mask. */ macro
248 data = PHY_BCTL_SPEED_100M_MASK | PHY_BCTL_DUPLEX_MASK | PHY_BCTL_LOOP_MASK; in rt_phy_loopback()
252 data = PHY_BCTL_DUPLEX_MASK | PHY_BCTL_LOOP_MASK; in rt_phy_loopback()
275 data &= ~PHY_BCTL_LOOP_MASK; in rt_phy_loopback()
/bsp/frdm-k64f/board/
A Dfsl_phy.c211 return PHY_Write(base, phyAddr, PHY_BASICCONTROL_REG, (data | PHY_BCTL_LOOP_MASK)); in PHY_EnableLoopback()
233 return PHY_Write(base, phyAddr, PHY_BASICCONTROL_REG, (data & ~PHY_BCTL_LOOP_MASK)); in PHY_EnableLoopback()
A Dfsl_phy.h63 #define PHY_BCTL_LOOP_MASK 0x4000U /*!< The PHY loop bit mask. */ macro
/bsp/nxp/lpc/lpc54608-LPCXpresso/drivers/
A Dfsl_phy.h62 #define PHY_BCTL_LOOP_MASK 0x4000U /*!< The PHY loop bit mask. */ macro

Completed in 7 milliseconds