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Searched refs:PHY_BCTL_RESET_MASK (Results 1 – 6 of 6) sorted by relevance

/bsp/nxp/lpc/lpc54608-LPCXpresso/drivers/
A Dfsl_phy.c100 PHY_Write(base, phyAddr, PHY_BASICCONTROL_REG, PHY_BCTL_RESET_MASK); in PHY_Init()
104 } while (delay-- && reg & PHY_BCTL_RESET_MASK); in PHY_Init()
A Dfsl_phy.h63 #define PHY_BCTL_RESET_MASK 0x8000U /*!< The PHY reset bit mask. */ macro
/bsp/frdm-k64f/board/
A Dfsl_phy.h64 #define PHY_BCTL_RESET_MASK 0x8000U /*!< The PHY reset bit mask. */ macro
A Dfsl_phy.c93 result = PHY_Write(base, phyAddr, PHY_BASICCONTROL_REG, PHY_BCTL_RESET_MASK); in PHY_Init()
/bsp/nxp/imx/imxrt/libraries/drivers/
A Ddrv_ksz8081.c43 #define PHY_BCTL_RESET_MASK 0x8000U /*!< The PHY reset bit mask. */ macro
155 result = phy_ksz8081.ops->write(NULL, PHY_BASICCONTROL_REG, PHY_BCTL_RESET_MASK); in rt_phy_init()
A Ddrv_rtl8211f.c46 #define PHY_BCTL_RESET_MASK 0x8000U /*!< The PHY reset bit mask. */ macro
233 result = phy_rtl8211f.ops->write(PHY_BASICCONTROL_REG, PHY_BCTL_RESET_MASK); in rt_phy_init()

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