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Searched refs:PHY_INTERRUPT_MASK_REG (Results 1 – 10 of 10) sorted by relevance

/bsp/at32/libraries/rt_drivers/
A Ddrv_emac.h60 #define PHY_INTERRUPT_MASK_REG 0x15U macro
84 #define PHY_INTERRUPT_MASK_REG 0x12U macro
107 #define PHY_INTERRUPT_MASK_REG 0x1EU macro
128 #define PHY_INTERRUPT_MASK_REG 0x12U macro
A Ddrv_emac.c940 emac_phy_register_write(phy_addr, PHY_INTERRUPT_MASK_REG, PHY_INT_MASK); in phy_monitor_thread_entry()
/bsp/apm32/libraries/Drivers/
A Ddrv_eth.h27 #define PHY_INTERRUPT_MASK_REG 0x1EU macro
51 #define PHY_INTERRUPT_MASK_REG 0x15U macro
70 #define PHY_INTERRUPT_MASK_REG 0x12U macro
78 #define PHY_INTERRUPT_MASK_REG 0x1EU macro
/bsp/renesas/libraries/HAL_Drivers/
A Ddrv_eth.h41 #define PHY_INTERRUPT_MASK_REG 0x1EU macro
65 #define PHY_INTERRUPT_MASK_REG 0x15U macro
84 #define PHY_INTERRUPT_MASK_REG 0x12U macro
92 #define PHY_INTERRUPT_MASK_REG 0x1EU macro
/bsp/stm32/libraries/HAL_Drivers/drivers/
A Ddrv_eth.h40 #define PHY_INTERRUPT_MASK_REG 0x1EU macro
63 #define PHY_INTERRUPT_MASK_REG 0x15U macro
82 #define PHY_INTERRUPT_MASK_REG 0x12U macro
89 #define PHY_INTERRUPT_MASK_REG 0x12U macro
A Ddrv_eth.c539 HAL_ETH_WritePHYRegister(&EthHandle, PHY_INTERRUPT_MASK_REG, PHY_INT_MASK); in phy_monitor_thread_entry()
/bsp/stm32/stm32h750-artpi/board/port/
A Ddrv_eth.h52 #define PHY_INTERRUPT_MASK_REG 0x1EU macro
71 #define PHY_INTERRUPT_MASK_REG 0x15U macro
89 #define PHY_INTERRUPT_MASK_REG 0x12U macro
A Ddrv_eth.c494 HAL_ETH_WritePHYRegister(&EthHandle, PHY_ADDR, PHY_INTERRUPT_MASK_REG, PHY_INT_MASK); in phy_monitor_thread_entry()
/bsp/stm32/stm32mp157a-st-ev1/board/ports/eth/
A Ddrv_eth.c783 phy_write_reg(RTL8211E_PHY_ADDR, PHY_INTERRUPT_MASK_REG, PHY_INT_MASK); in phy_monitor_thread_entry()
/bsp/stm32/stm32mp157a-st-discovery/board/ports/
A Ddrv_eth.c795 phy_write_reg(RTL8211F_PHY_ADDR, PHY_INTERRUPT_MASK_REG, PHY_INT_MASK); in phy_monitor_thread_entry()

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