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Searched refs:PIO_OWDR (Results 1 – 5 of 5) sorted by relevance

/bsp/at91/at91sam9260/platform/
A Dat91_pio.h45 #define PIO_OWDR 0xa4 /* Output Write Disable Register */ macro
/bsp/microchip/same70/bsp/hri/
A Dhri_pio_e70b.h7448 ((Pio *)hw)->PIO_OWDR = PIO_OWSR_P0; in hri_pio_clear_OWSR_P0_bit()
7472 ((Pio *)hw)->PIO_OWDR = PIO_OWSR_P1; in hri_pio_clear_OWSR_P1_bit()
7496 ((Pio *)hw)->PIO_OWDR = PIO_OWSR_P2; in hri_pio_clear_OWSR_P2_bit()
7520 ((Pio *)hw)->PIO_OWDR = PIO_OWSR_P3; in hri_pio_clear_OWSR_P3_bit()
7544 ((Pio *)hw)->PIO_OWDR = PIO_OWSR_P4; in hri_pio_clear_OWSR_P4_bit()
7568 ((Pio *)hw)->PIO_OWDR = PIO_OWSR_P5; in hri_pio_clear_OWSR_P5_bit()
7592 ((Pio *)hw)->PIO_OWDR = PIO_OWSR_P6; in hri_pio_clear_OWSR_P6_bit()
7616 ((Pio *)hw)->PIO_OWDR = PIO_OWSR_P7; in hri_pio_clear_OWSR_P7_bit()
7640 ((Pio *)hw)->PIO_OWDR = PIO_OWSR_P8; in hri_pio_clear_OWSR_P8_bit()
8216 ((Pio *)hw)->PIO_OWDR = ~data; in hri_pio_write_OWSR_reg()
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/bsp/sam7x/drivers/
A DAT91SAM7X256.h457 AT91_REG PIO_OWDR; // Output Write Disable Register member
488 #define PIO_OWDR (AT91_CAST(AT91_REG *) 0x000000A4) // (PIO_OWDR) Output Write Disable Regi… macro
/bsp/at91/at91sam9g45/platform/
A Dat91sam9g45.h1530 AT91C_REG PIO_OWDR; // Output Write Disable Register member
1570 #define PIO_OWDR (AT91C_CAST(AT91C_REG *) 0x000000A4) // (PIO_OWDR) Output Write Disable Re… macro
/bsp/microchip/same70/bsp/same70b/include/component/
A Dpio.h7286 __O uint32_t PIO_OWDR; /**< (PIO Offset: 0xA4) Output Write Disable */ member
7359 …__O PIO_OWDR_Type PIO_OWDR; /**< Offset: 0xA4 ( /W 32) Output Write Disab… member

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