| /bsp/hpmicro/libraries/hpm_sdk/drivers/inc/ |
| A D | hpm_pllctl_drv.h | 60 ptr->PLL[pll].LOCK &= ~lock_mask; in pllctl_pll_unlock()
73 ptr->PLL[pll].LOCK = lock_mask; in pllctl_pll_lock()
110 ptr->PLL[pll].CFG1 = (ptr->PLL[pll].CFG1 & in pllctl_pll_powerdown()
131 cfg = ptr->PLL[pll].CFG1; in pllctl_pll_poweron()
176 ptr->PLL[pll].CFG0 = (ptr->PLL[pll].CFG0 in pllctl_pll_ss_enable()
203 …ptr->PLL[pll].CFG0 = ((ptr->PLL[pll].CFG0 & ~(PLLCTL_PLL_CFG0_POSTDIV1_MASK))) | PLLCTL_PLL_CFG0_P… in pllctl_set_postdiv1()
226 …ptr->PLL[pll].CFG2 = ((ptr->PLL[pll].CFG2 & ~(PLLCTL_PLL_CFG2_FBDIV_INT_MASK))) | PLLCTL_PLL_CFG2_… in pllctl_set_fbdiv_int()
249 ptr->PLL[pll].FREQ = (ptr->PLL[pll].FREQ & ~(PLLCTL_PLL_FREQ_FBDIV_FRAC_MASK)) in pllctl_set_fbdiv_frac()
269 ptr->PLL[pll].FREQ = (ptr->PLL[pll].FREQ & ~(PLLCTL_PLL_FREQ_FRAC_MASK)) in pllctl_set_frac()
315 ptr->PLL[pll].DIV1 = (ptr->PLL[pll].DIV1 & ~(PLLCTL_PLL_DIV1_DIV_MASK)) in pllctl_set_div()
[all …]
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| /bsp/hpmicro/libraries/hpm_sdk/drivers/src/ |
| A D | hpm_pllctl_drv.c | 35 ptr->PLL[pll].CFG0 |= PLLCTL_PLL_CFG0_DSMPD_MASK; in pllctl_set_pll_work_mode()
39 if (ptr->PLL[pll].CFG0 & PLLCTL_PLL_CFG0_DSMPD_MASK) { in pllctl_set_pll_work_mode()
42 ptr->PLL[pll].CFG0 &= ~PLLCTL_PLL_CFG0_DSMPD_MASK; in pllctl_set_pll_work_mode()
61 if (ptr->PLL[pll].CFG0 & PLLCTL_PLL_CFG0_DSMPD_MASK) { in pllctl_set_refdiv()
74 ptr->PLL[pll].CFG0 = (ptr->PLL[pll].CFG0 & ~PLLCTL_PLL_CFG0_REFDIV_MASK) in pllctl_set_refdiv()
94 refdiv = PLLCTL_PLL_CFG0_REFDIV_GET(ptr->PLL[pll].CFG0); in pllctl_init_int_pll_with_freq()
132 ptr->PLL[pll].CFG0 |= PLLCTL_PLL_CFG0_DSMPD_MASK; in pllctl_init_int_pll_with_freq()
138 ptr->PLL[pll].CFG0 = (ptr->PLL[pll].CFG0 & ~PLLCTL_PLL_CFG0_REFDIV_MASK) in pllctl_init_int_pll_with_freq()
142 …ptr->PLL[pll].CFG2 = (ptr->PLL[pll].CFG2 & ~(PLLCTL_PLL_CFG2_FBDIV_INT_MASK)) | PLLCTL_PLL_CFG2_FB… in pllctl_init_int_pll_with_freq()
207 ptr->PLL[pll].CFG0 = (ptr->PLL[pll].CFG0 in pllctl_init_frac_pll_with_freq()
[all …]
|
| A D | hpm_pllctlv2_drv.c | 28 if (PLLCTLV2_PLL_MFI_MFI_GET(ptr->PLL[pll].MFI) == mfi) { in pllctlv2_set_pll_with_mfi_mfn()
29 ptr->PLL[pll].MFI = mfi - 1U; in pllctlv2_set_pll_with_mfi_mfn()
31 ptr->PLL[pll].MFI = mfi; in pllctlv2_set_pll_with_mfi_mfn()
32 ptr->PLL[pll].MFN = mfn; in pllctlv2_set_pll_with_mfi_mfn()
49 if (PLLCTLV2_PLL_MFI_MFI_GET(ptr->PLL[pll].MFI) == mfi) { in pllctlv2_init_pll_with_freq()
50 ptr->PLL[pll].MFI = mfi - 1U; in pllctlv2_init_pll_with_freq()
53 ptr->PLL[pll].MFI = mfi; in pllctlv2_init_pll_with_freq()
57 ptr->PLL[pll].MFN = mfn * PLLCTLV2_PLL_MFN_FACTOR; in pllctlv2_init_pll_with_freq()
75 ptr->PLL[pll].SS_STEP = step; in pllctlv2_enable_spread_spectrum()
76 ptr->PLL[pll].SS_STOP = stop; in pllctlv2_enable_spread_spectrum()
[all …]
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| /bsp/stm32/stm32l476-st-nucleo/board/ |
| A D | board.c | 33 RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON; in SystemClock_Config()
35 RCC_OscInitStruct.PLL.PLLM = 1; in SystemClock_Config()
36 RCC_OscInitStruct.PLL.PLLN = 10; in SystemClock_Config()
37 RCC_OscInitStruct.PLL.PLLP = RCC_PLLP_DIV7; in SystemClock_Config()
38 RCC_OscInitStruct.PLL.PLLQ = RCC_PLLQ_DIV2; in SystemClock_Config()
39 RCC_OscInitStruct.PLL.PLLR = RCC_PLLR_DIV2; in SystemClock_Config()
118 RCC_OscInitStruct.PLL.PLLM = 1; in SystemClock_80M()
119 RCC_OscInitStruct.PLL.PLLN = 10; in SystemClock_80M()
120 RCC_OscInitStruct.PLL.PLLP = RCC_PLLP_DIV7; in SystemClock_80M()
155 RCC_OscInitStruct.PLL.PLLM = 1; in SystemClock_24M()
[all …]
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| /bsp/stm32/stm32l475-atk-pandora/board/ |
| A D | board.c | 31 RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON; in SystemClock_Config()
33 RCC_OscInitStruct.PLL.PLLM = 1; in SystemClock_Config()
34 RCC_OscInitStruct.PLL.PLLN = 20; in SystemClock_Config()
35 RCC_OscInitStruct.PLL.PLLP = RCC_PLLP_DIV7; in SystemClock_Config()
36 RCC_OscInitStruct.PLL.PLLQ = RCC_PLLQ_DIV2; in SystemClock_Config()
37 RCC_OscInitStruct.PLL.PLLR = RCC_PLLR_DIV2; in SystemClock_Config()
128 RCC_OscInitStruct.PLL.PLLM = 1; in SystemClock_80M()
129 RCC_OscInitStruct.PLL.PLLN = 20; in SystemClock_80M()
130 RCC_OscInitStruct.PLL.PLLP = RCC_PLLP_DIV7; in SystemClock_80M()
163 RCC_OscInitStruct.PLL.PLLM = 1; in SystemClock_24M()
[all …]
|
| /bsp/stm32/stm32l496-ali-developer/board/ |
| A D | board.c | 33 RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON; in SystemClock_Config()
35 RCC_OscInitStruct.PLL.PLLM = 1; in SystemClock_Config()
36 RCC_OscInitStruct.PLL.PLLN = 40; in SystemClock_Config()
37 RCC_OscInitStruct.PLL.PLLP = RCC_PLLP_DIV2; in SystemClock_Config()
38 RCC_OscInitStruct.PLL.PLLQ = RCC_PLLQ_DIV2; in SystemClock_Config()
39 RCC_OscInitStruct.PLL.PLLR = RCC_PLLR_DIV2; in SystemClock_Config()
132 RCC_OscInitStruct.PLL.PLLM = 1; in SystemClock_80M()
133 RCC_OscInitStruct.PLL.PLLN = 20; in SystemClock_80M()
171 RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON; in SystemClock_Config_fromSTOP()
200 RCC_OscInitStruct.PLL.PLLM = 1; in SystemClock_24M()
[all …]
|
| /bsp/stm32/stm32u585-iot02a/board/ |
| A D | board.c | 31 RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON; in SystemClock_Config()
32 RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_MSI; in SystemClock_Config()
33 RCC_OscInitStruct.PLL.PLLMBOOST = RCC_PLLMBOOST_DIV1; in SystemClock_Config()
34 RCC_OscInitStruct.PLL.PLLM = 1; in SystemClock_Config()
35 RCC_OscInitStruct.PLL.PLLN = 80; in SystemClock_Config()
36 RCC_OscInitStruct.PLL.PLLP = 2; in SystemClock_Config()
37 RCC_OscInitStruct.PLL.PLLQ = 2; in SystemClock_Config()
38 RCC_OscInitStruct.PLL.PLLR = 2; in SystemClock_Config()
39 RCC_OscInitStruct.PLL.PLLRGE = RCC_PLLVCIRANGE_0; in SystemClock_Config()
40 RCC_OscInitStruct.PLL.PLLFRACN = 0; in SystemClock_Config()
|
| /bsp/stm32/stm32h503-st-nucleo/board/ |
| A D | board.c | 34 RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON; in SystemClock_Config()
35 RCC_OscInitStruct.PLL.PLLSource = RCC_PLL1_SOURCE_HSE; in SystemClock_Config()
36 RCC_OscInitStruct.PLL.PLLM = 12; in SystemClock_Config()
37 RCC_OscInitStruct.PLL.PLLN = 250; in SystemClock_Config()
38 RCC_OscInitStruct.PLL.PLLP = 2; in SystemClock_Config()
39 RCC_OscInitStruct.PLL.PLLQ = 2; in SystemClock_Config()
40 RCC_OscInitStruct.PLL.PLLR = 2; in SystemClock_Config()
41 RCC_OscInitStruct.PLL.PLLRGE = RCC_PLL1_VCIRANGE_1; in SystemClock_Config()
42 RCC_OscInitStruct.PLL.PLLVCOSEL = RCC_PLL1_VCORANGE_WIDE; in SystemClock_Config()
43 RCC_OscInitStruct.PLL.PLLFRACN = 0; in SystemClock_Config()
|
| /bsp/stm32/stm32h743-armfly-v7/board/ |
| A D | board.c | 31 RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON; in SystemClock_Config()
32 RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSE; in SystemClock_Config()
33 RCC_OscInitStruct.PLL.PLLM = 5; in SystemClock_Config()
34 RCC_OscInitStruct.PLL.PLLN = 160; in SystemClock_Config()
35 RCC_OscInitStruct.PLL.PLLP = 2; in SystemClock_Config()
36 RCC_OscInitStruct.PLL.PLLQ = 2; in SystemClock_Config()
37 RCC_OscInitStruct.PLL.PLLR = 2; in SystemClock_Config()
38 RCC_OscInitStruct.PLL.PLLRGE = RCC_PLL1VCIRANGE_2; in SystemClock_Config()
39 RCC_OscInitStruct.PLL.PLLVCOSEL = RCC_PLL1VCOWIDE; in SystemClock_Config()
40 RCC_OscInitStruct.PLL.PLLFRACN = 0; in SystemClock_Config()
|
| /bsp/stm32/stm32h743-openmv-h7plus/board/ |
| A D | board.c | 34 RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON; in SystemClock_Config()
35 RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSE; in SystemClock_Config()
36 RCC_OscInitStruct.PLL.PLLM = 3; in SystemClock_Config()
37 RCC_OscInitStruct.PLL.PLLN = 200; in SystemClock_Config()
38 RCC_OscInitStruct.PLL.PLLP = 2; in SystemClock_Config()
39 RCC_OscInitStruct.PLL.PLLQ = 4; in SystemClock_Config()
40 RCC_OscInitStruct.PLL.PLLR = 2; in SystemClock_Config()
41 RCC_OscInitStruct.PLL.PLLRGE = RCC_PLL1VCIRANGE_2; in SystemClock_Config()
42 RCC_OscInitStruct.PLL.PLLVCOSEL = RCC_PLL1VCOWIDE; in SystemClock_Config()
43 RCC_OscInitStruct.PLL.PLLFRACN = 0; in SystemClock_Config()
|
| /bsp/stm32/stm32h563-st-nucleo/board/ |
| A D | board.c | 38 RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON; in SystemClock_Config()
39 RCC_OscInitStruct.PLL.PLLSource = RCC_PLL1_SOURCE_HSE; in SystemClock_Config()
40 RCC_OscInitStruct.PLL.PLLM = 4; in SystemClock_Config()
41 RCC_OscInitStruct.PLL.PLLN = 250; in SystemClock_Config()
42 RCC_OscInitStruct.PLL.PLLP = 2; in SystemClock_Config()
43 RCC_OscInitStruct.PLL.PLLQ = 2; in SystemClock_Config()
44 RCC_OscInitStruct.PLL.PLLR = 2; in SystemClock_Config()
45 RCC_OscInitStruct.PLL.PLLRGE = RCC_PLL1_VCIRANGE_1; in SystemClock_Config()
46 RCC_OscInitStruct.PLL.PLLVCOSEL = RCC_PLL1_VCORANGE_WIDE; in SystemClock_Config()
47 RCC_OscInitStruct.PLL.PLLFRACN = 0; in SystemClock_Config()
|
| /bsp/stm32/stm32h743-st-nucleo/board/ |
| A D | board.c | 35 RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON; in SystemClock_Config()
36 RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSE; in SystemClock_Config()
37 RCC_OscInitStruct.PLL.PLLM = 1; in SystemClock_Config()
38 RCC_OscInitStruct.PLL.PLLN = 120; in SystemClock_Config()
39 RCC_OscInitStruct.PLL.PLLP = 2; in SystemClock_Config()
40 RCC_OscInitStruct.PLL.PLLQ = 2; in SystemClock_Config()
41 RCC_OscInitStruct.PLL.PLLR = 2; in SystemClock_Config()
42 RCC_OscInitStruct.PLL.PLLRGE = RCC_PLL1VCIRANGE_3; in SystemClock_Config()
43 RCC_OscInitStruct.PLL.PLLVCOSEL = RCC_PLL1VCOWIDE; in SystemClock_Config()
44 RCC_OscInitStruct.PLL.PLLFRACN = 0; in SystemClock_Config()
|
| /bsp/stm32/stm32h747-st-discovery/board/ |
| A D | board.c | 56 RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON; in SystemClock_Config()
57 RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSE; in SystemClock_Config()
59 RCC_OscInitStruct.PLL.PLLM = 5; in SystemClock_Config()
60 RCC_OscInitStruct.PLL.PLLN = 160; in SystemClock_Config()
61 RCC_OscInitStruct.PLL.PLLFRACN = 0; in SystemClock_Config()
62 RCC_OscInitStruct.PLL.PLLP = 2; in SystemClock_Config()
63 RCC_OscInitStruct.PLL.PLLR = 2; in SystemClock_Config()
64 RCC_OscInitStruct.PLL.PLLQ = 4; in SystemClock_Config()
66 RCC_OscInitStruct.PLL.PLLVCOSEL = RCC_PLL1VCOWIDE; in SystemClock_Config()
67 RCC_OscInitStruct.PLL.PLLRGE = RCC_PLL1VCIRANGE_2; in SystemClock_Config()
|
| /bsp/stm32/stm32u575-st-nucleo/board/ |
| A D | board.c | 45 RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON; in SystemClock_Config()
46 RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_MSI; in SystemClock_Config()
47 RCC_OscInitStruct.PLL.PLLMBOOST = RCC_PLLMBOOST_DIV1; in SystemClock_Config()
48 RCC_OscInitStruct.PLL.PLLM = 1; in SystemClock_Config()
49 RCC_OscInitStruct.PLL.PLLN = 80; in SystemClock_Config()
50 RCC_OscInitStruct.PLL.PLLR = 2; in SystemClock_Config()
51 RCC_OscInitStruct.PLL.PLLP = 2; in SystemClock_Config()
52 RCC_OscInitStruct.PLL.PLLQ = 2; in SystemClock_Config()
53 RCC_OscInitStruct.PLL.PLLFRACN= 0; in SystemClock_Config()
54 RCC_OscInitStruct.PLL.PLLRGE = RCC_PLLVCIRANGE_0; in SystemClock_Config()
|
| /bsp/stm32/libraries/templates/stm32h7xx/board/ |
| A D | board.c | 34 RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON; in SystemClock_Config()
35 RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSE; in SystemClock_Config()
36 RCC_OscInitStruct.PLL.PLLM = 5; in SystemClock_Config()
37 RCC_OscInitStruct.PLL.PLLN = 160; in SystemClock_Config()
38 RCC_OscInitStruct.PLL.PLLP = 2; in SystemClock_Config()
39 RCC_OscInitStruct.PLL.PLLQ = 2; in SystemClock_Config()
40 RCC_OscInitStruct.PLL.PLLR = 2; in SystemClock_Config()
41 RCC_OscInitStruct.PLL.PLLRGE = RCC_PLL1VCIRANGE_2; in SystemClock_Config()
42 RCC_OscInitStruct.PLL.PLLVCOSEL = RCC_PLL1VCOWIDE; in SystemClock_Config()
43 RCC_OscInitStruct.PLL.PLLFRACN = 0; in SystemClock_Config()
|
| /bsp/stm32/stm32h743-atk-apollo/board/ |
| A D | board.c | 41 RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON; in SystemClock_Config()
42 RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSE; in SystemClock_Config()
43 RCC_OscInitStruct.PLL.PLLM = 5; in SystemClock_Config()
44 RCC_OscInitStruct.PLL.PLLN = 160; in SystemClock_Config()
45 RCC_OscInitStruct.PLL.PLLP = 2; in SystemClock_Config()
46 RCC_OscInitStruct.PLL.PLLQ = 4; in SystemClock_Config()
47 RCC_OscInitStruct.PLL.PLLR = 2; in SystemClock_Config()
48 RCC_OscInitStruct.PLL.PLLRGE = RCC_PLL1VCIRANGE_2; in SystemClock_Config()
49 RCC_OscInitStruct.PLL.PLLVCOSEL = RCC_PLL1VCOWIDE; in SystemClock_Config()
50 RCC_OscInitStruct.PLL.PLLFRACN = 0; in SystemClock_Config()
|
| /bsp/stm32/stm32h750-armfly-h7-tool/board/ |
| A D | board.c | 39 RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON; in SystemClock_Config()
40 RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSE; in SystemClock_Config()
41 RCC_OscInitStruct.PLL.PLLM = 5; in SystemClock_Config()
42 RCC_OscInitStruct.PLL.PLLN = 160; in SystemClock_Config()
43 RCC_OscInitStruct.PLL.PLLP = 2; in SystemClock_Config()
44 RCC_OscInitStruct.PLL.PLLQ = 2; in SystemClock_Config()
45 RCC_OscInitStruct.PLL.PLLR = 2; in SystemClock_Config()
46 RCC_OscInitStruct.PLL.PLLRGE = RCC_PLL1VCIRANGE_2; in SystemClock_Config()
47 RCC_OscInitStruct.PLL.PLLVCOSEL = RCC_PLL1VCOWIDE; in SystemClock_Config()
48 RCC_OscInitStruct.PLL.PLLFRACN = 0; in SystemClock_Config()
|
| /bsp/stm32/stm32u585-iot02a/board/CubeMX_Config/Src/ |
| A D | main.c | 133 RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON; in SystemClock_Config()
134 RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_MSI; in SystemClock_Config()
135 RCC_OscInitStruct.PLL.PLLMBOOST = RCC_PLLMBOOST_DIV1; in SystemClock_Config()
136 RCC_OscInitStruct.PLL.PLLM = 1; in SystemClock_Config()
137 RCC_OscInitStruct.PLL.PLLN = 80; in SystemClock_Config()
138 RCC_OscInitStruct.PLL.PLLP = 2; in SystemClock_Config()
139 RCC_OscInitStruct.PLL.PLLQ = 2; in SystemClock_Config()
140 RCC_OscInitStruct.PLL.PLLR = 2; in SystemClock_Config()
141 RCC_OscInitStruct.PLL.PLLRGE = RCC_PLLVCIRANGE_0; in SystemClock_Config()
142 RCC_OscInitStruct.PLL.PLLFRACN = 0; in SystemClock_Config()
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| /bsp/stm32/stm32h750-fk750m1-vbt6/board/ |
| A D | board.c | 63 RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON; in SystemClock_Config()
64 RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSE; in SystemClock_Config()
65 RCC_OscInitStruct.PLL.PLLM = 5; in SystemClock_Config()
66 RCC_OscInitStruct.PLL.PLLN = 192; in SystemClock_Config()
67 RCC_OscInitStruct.PLL.PLLP = 2; in SystemClock_Config()
68 RCC_OscInitStruct.PLL.PLLQ = 2; in SystemClock_Config()
69 RCC_OscInitStruct.PLL.PLLR = 2; in SystemClock_Config()
70 RCC_OscInitStruct.PLL.PLLRGE = RCC_PLL1VCIRANGE_2; in SystemClock_Config()
71 RCC_OscInitStruct.PLL.PLLVCOSEL = RCC_PLL1VCOWIDE; in SystemClock_Config()
72 RCC_OscInitStruct.PLL.PLLFRACN = 0; in SystemClock_Config()
|
| /bsp/stm32/stm32h750-weact-ministm32h7xx/board/ |
| A D | board.c | 61 RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON; in SystemClock_Config()
62 RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSE; in SystemClock_Config()
63 RCC_OscInitStruct.PLL.PLLM = 5; in SystemClock_Config()
64 RCC_OscInitStruct.PLL.PLLN = 192; in SystemClock_Config()
65 RCC_OscInitStruct.PLL.PLLP = 2; in SystemClock_Config()
66 RCC_OscInitStruct.PLL.PLLQ = 2; in SystemClock_Config()
67 RCC_OscInitStruct.PLL.PLLR = 2; in SystemClock_Config()
68 RCC_OscInitStruct.PLL.PLLRGE = RCC_PLL1VCIRANGE_2; in SystemClock_Config()
69 RCC_OscInitStruct.PLL.PLLVCOSEL = RCC_PLL1VCOWIDE; in SystemClock_Config()
70 RCC_OscInitStruct.PLL.PLLFRACN = 0; in SystemClock_Config()
|
| /bsp/stm32/stm32wl55-st-nucleo/board/ |
| A D | board.c | 24 RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSI; in SystemClock_Config()
25 RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON; in SystemClock_Config()
26 RCC_OscInitStruct.PLL.PLLM = RCC_PLLM_DIV2; in SystemClock_Config()
27 RCC_OscInitStruct.PLL.PLLN = 30; in SystemClock_Config()
28 RCC_OscInitStruct.PLL.PLLR = RCC_PLLR_DIV5; in SystemClock_Config()
29 RCC_OscInitStruct.PLL.PLLP = RCC_PLLP_DIV5; in SystemClock_Config()
30 RCC_OscInitStruct.PLL.PLLQ = RCC_PLLQ_DIV5; in SystemClock_Config()
|
| /bsp/stm32/stm32wle5-yizhilian-lm401/board/ |
| A D | board.c | 24 RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSI; in SystemClock_Config()
25 RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON; in SystemClock_Config()
26 RCC_OscInitStruct.PLL.PLLM = RCC_PLLM_DIV2; in SystemClock_Config()
27 RCC_OscInitStruct.PLL.PLLN = 30; in SystemClock_Config()
28 RCC_OscInitStruct.PLL.PLLR = RCC_PLLR_DIV5; in SystemClock_Config()
29 RCC_OscInitStruct.PLL.PLLP = RCC_PLLP_DIV5; in SystemClock_Config()
30 RCC_OscInitStruct.PLL.PLLQ = RCC_PLLQ_DIV5; in SystemClock_Config()
|
| /bsp/stm32/stm32l433-ali-startkit/board/ |
| A D | board.c | 30 RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON; in SystemClock_Config()
31 RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSE; in SystemClock_Config()
32 RCC_OscInitStruct.PLL.PLLM = 2; in SystemClock_Config()
33 RCC_OscInitStruct.PLL.PLLN = 40; in SystemClock_Config()
34 RCC_OscInitStruct.PLL.PLLP = RCC_PLLP_DIV7; in SystemClock_Config()
35 RCC_OscInitStruct.PLL.PLLQ = RCC_PLLQ_DIV2; in SystemClock_Config()
36 RCC_OscInitStruct.PLL.PLLR = RCC_PLLR_DIV2; in SystemClock_Config()
|
| /bsp/stm32/stm32f446-st-nucleo/board/ |
| A D | board.c | 28 RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON; in SystemClock_Config()
29 RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSE; in SystemClock_Config()
30 RCC_OscInitStruct.PLL.PLLM = 4; in SystemClock_Config()
31 RCC_OscInitStruct.PLL.PLLN = 180; in SystemClock_Config()
32 RCC_OscInitStruct.PLL.PLLP = RCC_PLLP_DIV2; in SystemClock_Config()
33 RCC_OscInitStruct.PLL.PLLQ = 2; in SystemClock_Config()
34 RCC_OscInitStruct.PLL.PLLR = 2; in SystemClock_Config()
|
| /bsp/stm32/stm32f410-st-nucleo/board/ |
| A D | board.c | 28 RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON; in SystemClock_Config()
29 RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSI; in SystemClock_Config()
30 RCC_OscInitStruct.PLL.PLLM = 16; in SystemClock_Config()
31 RCC_OscInitStruct.PLL.PLLN = 336; in SystemClock_Config()
32 RCC_OscInitStruct.PLL.PLLP = RCC_PLLP_DIV4; in SystemClock_Config()
33 RCC_OscInitStruct.PLL.PLLQ = 4; in SystemClock_Config()
34 RCC_OscInitStruct.PLL.PLLR = 2; in SystemClock_Config()
|