PLLCTL_PLL_CFG0_SS_DIVVAL_SET (reference) in projects: bsp

Searched refs:PLLCTL_PLL_CFG0_SS_DIVVAL_SET (Results 1 – 2 of 2) sorted by relevance

/bsp/hpmicro/libraries/hpm_sdk/drivers/inc/
A D	hpm_pllctl_drv.h	`179 \| PLLCTL_PLL_CFG0_SS_DIVVAL_SET(div) in pllctl_pll_ss_enable()`
/bsp/hpmicro/libraries/hpm_sdk/soc/HPM6700/ip/
A D	hpm_pllctl_regs.h	`116 #define PLLCTL_PLL_CFG0_SS_DIVVAL_SET(x) (((uint32_t)(x) << PLLCTL_PLL_CFG0_SS_DIVVAL_SHIFT) & PLLC… macro`

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