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Searched refs:PLLCTL_PLL_CFG1_PLLPD_SW_MASK (Results 1 – 3 of 3) sorted by relevance

/bsp/hpmicro/libraries/hpm_sdk/drivers/inc/
A Dhpm_pllctl_drv.h112 | PLLCTL_PLL_CFG1_PLLPD_SW_MASK; in pllctl_pll_powerdown()
132 if (!(cfg & PLLCTL_PLL_CFG1_PLLPD_SW_MASK)) { in pllctl_pll_poweron()
140 ptr->PLL[pll].CFG1 &= ~PLLCTL_PLL_CFG1_PLLPD_SW_MASK; in pllctl_pll_poweron()
169 if (!(ptr->PLL[pll].CFG1 & PLLCTL_PLL_CFG1_PLLPD_SW_MASK)) { in pllctl_pll_ss_enable()
/bsp/hpmicro/libraries/hpm_sdk/soc/HPM6700/ip/
A Dhpm_pllctl_regs.h190 #define PLLCTL_PLL_CFG1_PLLPD_SW_MASK (0x2000000UL) macro
192 …PLLPD_SW_SET(x) (((uint32_t)(x) << PLLCTL_PLL_CFG1_PLLPD_SW_SHIFT) & PLLCTL_PLL_CFG1_PLLPD_SW_MASK)
193 #define PLLCTL_PLL_CFG1_PLLPD_SW_GET(x) (((uint32_t)(x) & PLLCTL_PLL_CFG1_PLLPD_SW_MASK) >> PLLCTL_…
/bsp/hpmicro/libraries/hpm_sdk/drivers/src/
A Dhpm_pllctl_drv.c226 if (ptr->PLL[pll].CFG1 & PLLCTL_PLL_CFG1_PLLPD_SW_MASK) { in pllctl_get_pll_freq_in_hz()

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