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Searched refs:PLLCTL_PLL_PLL2 (Results 1 – 4 of 4) sorted by relevance

/bsp/hpmicro/libraries/hpm_sdk/soc/HPM6700/ip/
A Dhpm_pllctl_regs.h441 #define PLLCTL_PLL_PLL2 (2UL) macro
/bsp/hpmicro/hpm6750evkmini/board/
A Dboard.c1250 … if (pllctl_init_int_pll_with_freq(HPM_PLLCTL, PLLCTL_PLL_PLL2, 1000000000UL) == status_success) { in board_init_enet_rmii_reference_clock()
1252 pllctl_set_div(HPM_PLLCTL, PLLCTL_PLL_PLL2, 1, 4); in board_init_enet_rmii_reference_clock()
/bsp/hpmicro/hpm6750evk2/board/
A Dboard.c1217 … if (pllctl_init_int_pll_with_freq(HPM_PLLCTL, PLLCTL_PLL_PLL2, 1000000000UL) == status_success) { in board_init_enet_rmii_reference_clock()
1219 pllctl_set_div(HPM_PLLCTL, PLLCTL_PLL_PLL2, 1, 4); in board_init_enet_rmii_reference_clock()
/bsp/hpmicro/hpm6750evk/board/
A Dboard.c1253 … if (pllctl_init_int_pll_with_freq(HPM_PLLCTL, PLLCTL_PLL_PLL2, 1000000000UL) == status_success) { in board_init_enet_rmii_reference_clock()
1255 pllctl_set_div(HPM_PLLCTL, PLLCTL_PLL_PLL2, 1, 4); in board_init_enet_rmii_reference_clock()

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