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Searched refs:PLLL (Results 1 – 6 of 6) sorted by relevance

/bsp/Vango/v85xxp/Libraries/VangoV85xxP_standard_peripheral/Source/
A Dlib_clk.c137 assert_parameters(IS_CLK_PLLLSRC(CLK_ClkInitStruct->PLLL.Source)); in CLK_ClockConfig()
138 assert_parameters(IS_CLK_PLLLSTA(CLK_ClkInitStruct->PLLL.State)); in CLK_ClockConfig()
139 assert_parameters(IS_CLK_PLLLFRQ(CLK_ClkInitStruct->PLLL.Frequency)); in CLK_ClockConfig()
142 if (CLK_ClkInitStruct->PLLL.State == CLK_PLLL_ON) in CLK_ClockConfig()
150 tmp |= CLK_ClkInitStruct->PLLL.Frequency; in CLK_ClockConfig()
156 tmp |= CLK_ClkInitStruct->PLLL.Source; in CLK_ClockConfig()
606 CLK_ClkInitStruct->PLLL.Source = (uint32_t)(PMU->CONTROL & PMU_CONTROL_PLLL_SEL); in CLK_GetClockConfig()
607 CLK_ClkInitStruct->PLLL.Frequency = (uint32_t)(ANA->REG9 & ANA_REG9_PLLLSEL); in CLK_GetClockConfig()
608 CLK_ClkInitStruct->PLLL.State = (uint32_t)(ANA->REG3 & ANA_REG3_PLLLPDN); in CLK_GetClockConfig()
/bsp/Vango/v85xx/Libraries/VangoV85xx_standard_peripheral/Source/
A Dlib_clk.c139 assert_parameters(IS_CLK_PLLLSRC(CLK_ClkInitStruct->PLLL.Source)); in CLK_ClockConfig()
140 assert_parameters(IS_CLK_PLLLSTA(CLK_ClkInitStruct->PLLL.State)); in CLK_ClockConfig()
141 assert_parameters(IS_CLK_PLLLFRQ(CLK_ClkInitStruct->PLLL.Frequency)); in CLK_ClockConfig()
149 if (CLK_ClkInitStruct->PLLL.State == CLK_PLLL_ON) in CLK_ClockConfig()
158 tmp |= CLK_ClkInitStruct->PLLL.Frequency; in CLK_ClockConfig()
164 tmp |= CLK_ClkInitStruct->PLLL.Source; in CLK_ClockConfig()
566 CLK_ClkInitStruct->PLLL.Source = (uint32_t)(PMU->CONTROL & PMU_CONTROL_PLLL_SEL); in CLK_GetClockConfig()
567 CLK_ClkInitStruct->PLLL.Frequency = (uint32_t)(ANA->REG9 & ANA_REG9_PLLLSEL); in CLK_GetClockConfig()
568 CLK_ClkInitStruct->PLLL.State = (uint32_t)(ANA->REG3 & ANA_REG3_PLLLPDN); in CLK_GetClockConfig()
/bsp/Vango/v85xxp/drivers/
A Dboard.c36 CLK_Struct.PLLL.Frequency = CLK_PLLL_26_2144MHz; in SystemClock_Config()
37 CLK_Struct.PLLL.Source = CLK_PLLLSRC_XTALL; in SystemClock_Config()
38 CLK_Struct.PLLL.State = CLK_PLLL_ON; in SystemClock_Config()
/bsp/Vango/v85xx/drivers/
A Dboard.c36 CLK_Struct.PLLL.Frequency = CLK_PLLL_26_2144MHz; in SystemClock_Config()
37 CLK_Struct.PLLL.Source = CLK_PLLLSRC_XTALL; in SystemClock_Config()
38 CLK_Struct.PLLL.State = CLK_PLLL_ON; in SystemClock_Config()
/bsp/Vango/v85xx/Libraries/VangoV85xx_standard_peripheral/Include/
A Dlib_clk.h76 PLLL_ConfTypeDef PLLL; member
/bsp/Vango/v85xxp/Libraries/VangoV85xxP_standard_peripheral/Include/
A Dlib_clk.h76 PLLL_ConfTypeDef PLLL; member

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