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Searched refs:PLL_IN_DIV (Results 1 – 2 of 2) sorted by relevance

/bsp/synwit/libraries/SWM320_CSL/CMSIS/DeviceSupport/
A Dsystem_SWM320.c55 #define PLL_IN_DIV 5 macro
112 … SystemCoreClock = SystemCoreClock / PLL_IN_DIV * PLL_FB_DIV * 4 / (2 << (2 - PLL_OUT_DIV)); in SystemCoreClockUpdate()
278 SYS->PLLDIV |= (PLL_IN_DIV << SYS_PLLDIV_INDIV_Pos) | in PLLInit()
/bsp/synwit/libraries/SWM341_CSL/CMSIS/DeviceSupport/
A Dsystem_SWM341.c55 #define PLL_IN_DIV 3 macro
110 … SystemCoreClock = SystemCoreClock / PLL_IN_DIV * PLL_FB_DIV * 4 / (2 << (2 - PLL_OUT_DIV)); in SystemCoreClockUpdate()
401 SYS->PLLDIV |= (PLL_IN_DIV << SYS_PLLDIV_INDIV_Pos) | in PLLInit()

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