| /bsp/ht32/libraries/HT32_STD_5xxxx_FWLib/library/Device/Holtek/HT32F5xxxx/Source/ |
| A D | system_ht32f0006.c | 134 #define PLL_NO2_DIV (0) /*!< 0: DIV1, 1: DIV2, 2: DIV4, 3: DIV8 … macro
230 …#define __CK_PLL (__CK_VCO >> PLL_NO2_DIV) /*!< Get CK_PLL frequency …
375 …HT_CKCU->PLLCFGR = ((PLL_NF2_DIV & 0x0F) << 23) | (PLL_NO2_DIV << 21); /* set PLL divider … in SystemInit()
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| A D | system_ht32f5xxxx_07.c | 138 #define PLL_NO2_DIV (0) /*!< 0: DIV1, 1: DIV2, 2: DIV4, 3: DIV8 … macro
234 …#define __CK_PLL (__CK_VCO >> PLL_NO2_DIV) /*!< Get CK_PLL frequency …
379 …HT_CKCU->PLLCFGR = ((PLL_NF2_DIV & 0x0F) << 23) | (PLL_NO2_DIV << 21); /* set PLL divider … in SystemInit()
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| A D | system_ht32f5xxxx_10.c | 135 #define PLL_NO2_DIV (0) /*!< 0: DIV1, 1: DIV2, 2: DIV4, 3: DIV8 … macro
223 …#define __CK_PLL (__CK_VCO >> PLL_NO2_DIV) /*!< Get CK_PLL frequency …
349 …HT_CKCU->PLLCFGR = ((PLL_NF2_DIV & 0x0F) << 23) | (PLL_NO2_DIV << 21); /* set PLL divider … in SystemInit()
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| A D | system_ht32f5826.c | 138 #define PLL_NO2_DIV (0) /*!< 0: DIV1, 1: DIV2, 2: DIV4, 3: DIV8 … macro
236 …#define __CK_PLL (__CK_VCO >> PLL_NO2_DIV) /*!< Get CK_PLL frequency …
401 …HT_CKCU->PLLCFGR = ((PLL_NF2_DIV & 0x0F) << 23) | (PLL_NO2_DIV << 21); /* set PLL divider … in SystemInit()
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| A D | system_ht32f5xxxx_01.c | 150 #define PLL_NO2_DIV (0) /*!< 0: DIV1, 1: DIV2, 2: DIV4, 3: DIV8 … macro
248 …#define __CK_PLL (__CK_VCO >> PLL_NO2_DIV) /*!< Get CK_PLL frequency …
413 …HT_CKCU->PLLCFGR = ((PLL_NF2_DIV & 0x0F) << 23) | (PLL_NO2_DIV << 21); /* set PLL divider … in SystemInit()
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| A D | system_ht32f5xxxx_02.c | 163 #define PLL_NO2_DIV (0) /*!< 0: DIV1, 1: DIV2, 2: DIV4, 3: DIV8 … macro
261 …#define __CK_PLL (__CK_VCO >> PLL_NO2_DIV) /*!< Get CK_PLL frequency …
426 …HT_CKCU->PLLCFGR = ((PLL_NF2_DIV & 0x0F) << 23) | (PLL_NO2_DIV << 21); /* set PLL divider … in SystemInit()
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| A D | system_ht32f5xxxx_03.c | 154 #define PLL_NO2_DIV (0) /*!< 0: DIV1, 1: DIV2, 2: DIV4, 3: DIV8 … macro
250 …#define __CK_PLL (__CK_VCO >> PLL_NO2_DIV) /*!< Get CK_PLL frequency …
397 …HT_CKCU->PLLCFGR = ((PLL_NF2_DIV & 0x0F) << 23) | (PLL_NO2_DIV << 21); /* set PLL divider … in SystemInit()
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| A D | system_ht32f5xxxx_05.c | 152 #define PLL_NO2_DIV (0) /*!< 0: DIV1, 1: DIV2, 2: DIV4, 3: DIV8 … macro
247 …#define __CK_PLL (__CK_VCO >> PLL_NO2_DIV) /*!< Get CK_PLL frequency …
389 …HT_CKCU->PLLCFGR = ((PLL_NF2_DIV & 0x0F) << 23) | (PLL_NO2_DIV << 21); /* set PLL divider … in SystemInit()
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| A D | system_ht32f5xxxx_06.c | 139 #define PLL_NO2_DIV (0) /*!< 0: DIV1, 1: DIV2, 2: DIV4, 3: DIV8 … macro
234 …#define __CK_PLL (__CK_VCO >> PLL_NO2_DIV) /*!< Get CK_PLL frequency …
376 …HT_CKCU->PLLCFGR = ((PLL_NF2_DIV & 0x0F) << 23) | (PLL_NO2_DIV << 21); /* set PLL divider … in SystemInit()
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| A D | system_ht32f5xxxx_08.c | 147 #define PLL_NO2_DIV (0) /*!< 0: DIV1, 1: DIV2, 2: DIV4, 3: DIV8 … macro
250 …#define __CK_PLL (__CK_VCO >> PLL_NO2_DIV) /*!< Get CK_PLL frequency …
397 …HT_CKCU->PLLCFGR = ((PLL_NF2_DIV & 0x0F) << 23) | (PLL_NO2_DIV << 21); /* set PLL divider … in SystemInit()
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| A D | system_ht32f5xxxx_09.c | 140 #define PLL_NO2_DIV (0) /*!< 0: DIV1, 1: DIV2, 2: DIV4, 3: DIV8 … macro
235 …#define __CK_PLL (__CK_VCO >> PLL_NO2_DIV) /*!< Get CK_PLL frequency …
377 …HT_CKCU->PLLCFGR = ((PLL_NF2_DIV & 0x0F) << 23) | (PLL_NO2_DIV << 21); /* set PLL divider … in SystemInit()
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| A D | system_ht32f5xxxx_11.c | 146 #define PLL_NO2_DIV (0) /*!< 0: DIV1, 1: DIV2, 2: DIV4, 3: DIV8 … macro
256 …#define __CK_PLL (__CK_VCO >> PLL_NO2_DIV) /*!< Get CK_PLL frequency …
398 …HT_CKCU->PLLCFGR = ((PLL_NF2_DIV & 0x0F) << 23) | (PLL_NO2_DIV << 21); /* set PLL divider … in SystemInit()
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| A D | system_ht32f5xxxx_12.c | 138 #define PLL_NO2_DIV (0) /*!< 0: DIV1, 1: DIV2, 2: DIV4, 3: DIV8 … macro
233 …#define __CK_PLL (__CK_VCO >> PLL_NO2_DIV) /*!< Get CK_PLL frequency …
373 …HT_CKCU->PLLCFGR = ((PLL_NF2_DIV & 0x0F) << 23) | (PLL_NO2_DIV << 21); /* set PLL divider … in SystemInit()
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| A D | system_ht32f5xxxx_14.c | 142 #define PLL_NO2_DIV (0) /*!< 0: DIV1, 1: DIV2, 2: DIV4, 3: DIV8 … macro
237 …#define __CK_PLL (__CK_VCO >> PLL_NO2_DIV) /*!< Get CK_PLL frequency …
377 …HT_CKCU->PLLCFGR = ((PLL_NF2_DIV & 0x0F) << 23) | (PLL_NO2_DIV << 21); /* set PLL divider … in SystemInit()
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| A D | system_ht32f5xxxx_15.c | 140 #define PLL_NO2_DIV (0) /*!< 0: DIV1, 1: DIV2, 2: DIV4, 3: DIV8 … macro
235 …#define __CK_PLL (__CK_VCO >> PLL_NO2_DIV) /*!< Get CK_PLL frequency …
375 …HT_CKCU->PLLCFGR = ((PLL_NF2_DIV & 0x0F) << 23) | (PLL_NO2_DIV << 21); /* set PLL divider … in SystemInit()
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| A D | system_ht32f5xxxx_16.c | 138 #define PLL_NO2_DIV (0) /*!< 0: DIV1, 1: DIV2, 2: DIV4, 3: DIV8 … macro
227 …#define __CK_PLL (__CK_VCO >> PLL_NO2_DIV) /*!< Get CK_PLL frequency …
353 …HT_CKCU->PLLCFGR = ((PLL_NF2_DIV & 0x1F) << 23) | (PLL_NO2_DIV << 21); /* set PLL divider … in SystemInit()
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| A D | system_ht32f5xxxx_17.c | 141 #define PLL_NO2_DIV (0) /*!< 0: DIV1, 1: DIV2, 2: DIV4, 3: DIV8 … macro
236 …#define __CK_PLL (__CK_VCO >> PLL_NO2_DIV) /*!< Get CK_PLL frequency …
376 …HT_CKCU->PLLCFGR = ((PLL_NF2_DIV & 0x0F) << 23) | (PLL_NO2_DIV << 21); /* set PLL divider … in SystemInit()
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| A D | system_ht32f5xxxx_18.c | 145 #define PLL_NO2_DIV (0) /*!< 0: DIV1, 1: DIV2, 2: DIV4, 3: DIV8 … macro
241 …#define __CK_PLL (__CK_VCO >> PLL_NO2_DIV) /*!< Get CK_PLL frequency …
388 …HT_CKCU->PLLCFGR = ((PLL_NF2_DIV & 0x0F) << 23) | (PLL_NO2_DIV << 21); /* set PLL divider … in SystemInit()
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| /bsp/ht32/libraries/HT32_STD_1xxxx_FWLib/library/Device/Holtek/HT32F1xxxx/Source/ |
| A D | system_ht32f1xxxx_01.c | 135 #define PLL_NO2_DIV (0) /*!< 0: DIV1, 1: DIV2, 2: DIV4, 3: DIV8 … macro
232 …#define __CK_PLL (__CK_VCO >> PLL_NO2_DIV) /*!< Get CK_PLL frequency …
360 …HT_CKCU->PLLCFGR = ((PLL_NF2_DIV & 0x3F) << 23) | (PLL_NO2_DIV << 21); /* set PLL divider … in SystemInit()
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| A D | system_ht32f1xxxx_02.c | 142 #define PLL_NO2_DIV (0) /*!< 0: DIV1, 1: DIV2, 2: DIV4, 3: DIV8 … macro
239 …#define __CK_PLL (__CK_VCO >> PLL_NO2_DIV) /*!< Get CK_PLL frequency …
403 …HT_CKCU->PLLCFGR = ((PLL_NF2_DIV & 0x1F) << 23) | (PLL_NO2_DIV << 21); /* set PLL divider … in SystemInit()
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| A D | system_ht32f1xxxx_03.c | 145 #define PLL_NO2_DIV (0) /*!< 0: DIV1, 1: DIV2, 2: DIV4, 3: DIV8 … macro
242 …#define __CK_PLL (__CK_VCO >> PLL_NO2_DIV) /*!< Get CK_PLL frequency …
391 …HT_CKCU->PLLCFGR = ((PLL_NF2_DIV & 0x1F) << 23) | (PLL_NO2_DIV << 21); /* set PLL divider … in SystemInit()
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