| /bsp/samd21/sam_d2x_asflib/sam0/drivers/system/clock/clock_samd20/ |
| A D | clock_feature.h | 990 bus_divider = PM->APBASEL.reg; in system_apb_clock_get_hz()
993 bus_divider = PM->APBBSEL.reg; in system_apb_clock_get_hz()
996 bus_divider = PM->APBCSEL.reg; in system_apb_clock_get_hz()
1028 PM->AHBMASK.reg |= ahb_mask; in system_ahb_clock_set_mask()
1043 PM->AHBMASK.reg &= ~ahb_mask; in system_ahb_clock_clear_mask()
1069 PM->APBAMASK.reg |= mask; in system_apb_clock_set_mask()
1073 PM->APBBMASK.reg |= mask; in system_apb_clock_set_mask()
1077 PM->APBCMASK.reg |= mask; in system_apb_clock_set_mask()
1111 PM->APBAMASK.reg &= ~mask; in system_apb_clock_clear_mask()
1115 PM->APBBMASK.reg &= ~mask; in system_apb_clock_clear_mask()
[all …]
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| /bsp/microchip/saml10/bsp/hpl/pm/ |
| A D | hpl_pm.c | 56 hri_pm_write_SLEEPCFG_SLEEPMODE_bf(PM, mode); in _set_sleep_mode()
70 if (hri_pm_get_PLCFG_PLSEL_bf(PM, PM_PLCFG_PLSEL_Msk) != level) { in _set_performance_level()
71 hri_pm_clear_INTFLAG_reg(PM, 0xFF); in _set_performance_level()
72 hri_pm_write_PLCFG_PLSEL_bf(PM, level); in _set_performance_level()
73 while (!hri_pm_read_INTFLAG_reg(PM)) in _set_performance_level()
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| /bsp/samd21/sam_d2x_asflib/sam0/drivers/system/clock/clock_samd21_r21_da_ha1/ |
| A D | clock_feature.h | 992 bus_divider = PM->APBASEL.reg; in system_apb_clock_get_hz()
995 bus_divider = PM->APBBSEL.reg; in system_apb_clock_get_hz()
998 bus_divider = PM->APBCSEL.reg; in system_apb_clock_get_hz()
1030 PM->AHBMASK.reg |= ahb_mask; in system_ahb_clock_set_mask()
1045 PM->AHBMASK.reg &= ~ahb_mask; in system_ahb_clock_clear_mask()
1071 PM->APBAMASK.reg |= mask; in system_apb_clock_set_mask()
1075 PM->APBBMASK.reg |= mask; in system_apb_clock_set_mask()
1079 PM->APBCMASK.reg |= mask; in system_apb_clock_set_mask()
1113 PM->APBAMASK.reg &= ~mask; in system_apb_clock_clear_mask()
1117 PM->APBBMASK.reg &= ~mask; in system_apb_clock_clear_mask()
[all …]
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| /bsp/samd21/sam_d2x_asflib/sam0/drivers/system/power/power_sam_l/ |
| A D | power.h | 762 PM->SLEEPCFG.reg = sleep_mode; in system_set_sleepmode()
763 while(PM->SLEEPCFG.reg != sleep_mode) ; in system_set_sleepmode()
813 if (PM->PLCFG.reg & PM_PLCFG_PLDIS) { in system_switch_performance_level()
819 PM->INTFLAG.reg = PM_INTFLAG_PLRDY; in system_switch_performance_level()
822 PM->PLCFG.reg = performance_level; in system_switch_performance_level()
825 while (!PM->INTFLAG.reg) { in system_switch_performance_level()
839 PM->PLCFG.reg &= ~PM_PLCFG_PLDIS; in system_performance_level_enable()
849 PM->PLCFG.reg |= PM_PLCFG_PLDIS; in system_performance_level_disable()
873 return PM->INTFLAG.reg; in system_get_performance_level_status()
883 PM->INTFLAG.reg = PM_INTFLAG_PLRDY; in system_clear_performance_level_status()
[all …]
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| /bsp/microchip/same54/bsp/hpl/pm/ |
| A D | hpl_pm.c | 51 hri_pm_write_SLEEPCFG_reg(PM, mode); in _set_sleep_mode()
58 if (hri_pm_read_SLEEPCFG_reg(PM) == mode) { in _set_sleep_mode()
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| /bsp/microchip/samd51-seeed-wio-terminal/bsp/hpl/pm/ |
| A D | hpl_pm.c | 51 hri_pm_write_SLEEPCFG_reg(PM, mode); in _set_sleep_mode()
58 if (hri_pm_read_SLEEPCFG_reg(PM) == mode) { in _set_sleep_mode()
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| /bsp/microchip/samd51-adafruit-metro-m4/bsp/hpl/pm/ |
| A D | hpl_pm.c | 51 hri_pm_write_SLEEPCFG_reg(PM, mode); in _set_sleep_mode()
58 if (hri_pm_read_SLEEPCFG_reg(PM) == mode) { in _set_sleep_mode()
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| /bsp/samd21/sam_d2x_asflib/sam0/drivers/system/power/power_sam_c/ |
| A D | power.h | 320 PM->SLEEPCFG.reg = sleep_mode; in system_set_sleepmode()
378 PM->STDBYCFG.reg = PM_STDBYCFG_VREGSMOD(config->vreg_switch_mode) | in system_standby_set_config()
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| /bsp/samd21/sam_d2x_asflib/sam0/utils/cmsis/samd20/include/ |
| A D | samd20e14.h | 358 #define PM (0x40000400UL) /**< \brief (PM) APB Base Address */ macro
420 #define PM ((Pm *)0x40000400UL) /**< \brief (PM) APB Base Address */ macro
422 #define PM_INSTS { PM } /**< \brief (PM) Instances List */
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| A D | samd20e15.h | 358 #define PM (0x40000400UL) /**< \brief (PM) APB Base Address */ macro
420 #define PM ((Pm *)0x40000400UL) /**< \brief (PM) APB Base Address */ macro
422 #define PM_INSTS { PM } /**< \brief (PM) Instances List */
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| A D | samd20g14.h | 363 #define PM (0x40000400UL) /**< \brief (PM) APB Base Address */ macro
427 #define PM ((Pm *)0x40000400UL) /**< \brief (PM) APB Base Address */ macro
429 #define PM_INSTS { PM } /**< \brief (PM) Instances List */
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| A D | samd20g15.h | 363 #define PM (0x40000400UL) /**< \brief (PM) APB Base Address */ macro
427 #define PM ((Pm *)0x40000400UL) /**< \brief (PM) APB Base Address */ macro
429 #define PM_INSTS { PM } /**< \brief (PM) Instances List */
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| A D | samd20g16.h | 363 #define PM (0x40000400UL) /**< \brief (PM) APB Base Address */ macro
427 #define PM ((Pm *)0x40000400UL) /**< \brief (PM) APB Base Address */ macro
429 #define PM_INSTS { PM } /**< \brief (PM) Instances List */
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| A D | samd20g17.h | 363 #define PM (0x40000400UL) /**< \brief (PM) APB Base Address */ macro
427 #define PM ((Pm *)0x40000400UL) /**< \brief (PM) APB Base Address */ macro
429 #define PM_INSTS { PM } /**< \brief (PM) Instances List */
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| A D | samd20g17u.h | 363 #define PM (0x40000400UL) /**< \brief (PM) APB Base Address */ macro
427 #define PM ((Pm *)0x40000400UL) /**< \brief (PM) APB Base Address */ macro
429 #define PM_INSTS { PM } /**< \brief (PM) Instances List */
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| A D | samd20g18.h | 363 #define PM (0x40000400UL) /**< \brief (PM) APB Base Address */ macro
427 #define PM ((Pm *)0x40000400UL) /**< \brief (PM) APB Base Address */ macro
429 #define PM_INSTS { PM } /**< \brief (PM) Instances List */
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| A D | samd20g18u.h | 363 #define PM (0x40000400UL) /**< \brief (PM) APB Base Address */ macro
427 #define PM ((Pm *)0x40000400UL) /**< \brief (PM) APB Base Address */ macro
429 #define PM_INSTS { PM } /**< \brief (PM) Instances List */
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| A D | samd20e16.h | 358 #define PM (0x40000400UL) /**< \brief (PM) APB Base Address */ macro
420 #define PM ((Pm *)0x40000400UL) /**< \brief (PM) APB Base Address */ macro
422 #define PM_INSTS { PM } /**< \brief (PM) Instances List */
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| A D | samd20e17.h | 358 #define PM (0x40000400UL) /**< \brief (PM) APB Base Address */ macro
420 #define PM ((Pm *)0x40000400UL) /**< \brief (PM) APB Base Address */ macro
422 #define PM_INSTS { PM } /**< \brief (PM) Instances List */
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| A D | samd20e18.h | 358 #define PM (0x40000400UL) /**< \brief (PM) APB Base Address */ macro
420 #define PM ((Pm *)0x40000400UL) /**< \brief (PM) APB Base Address */ macro
422 #define PM_INSTS { PM } /**< \brief (PM) Instances List */
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| A D | samd20j14.h | 374 #define PM (0x40000400UL) /**< \brief (PM) APB Base Address */ macro
440 #define PM ((Pm *)0x40000400UL) /**< \brief (PM) APB Base Address */ macro
442 #define PM_INSTS { PM } /**< \brief (PM) Instances List */
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| A D | samd20j15.h | 374 #define PM (0x40000400UL) /**< \brief (PM) APB Base Address */ macro
440 #define PM ((Pm *)0x40000400UL) /**< \brief (PM) APB Base Address */ macro
442 #define PM_INSTS { PM } /**< \brief (PM) Instances List */
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| A D | samd20j16.h | 374 #define PM (0x40000400UL) /**< \brief (PM) APB Base Address */ macro
440 #define PM ((Pm *)0x40000400UL) /**< \brief (PM) APB Base Address */ macro
442 #define PM_INSTS { PM } /**< \brief (PM) Instances List */
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| A D | samd20j17.h | 374 #define PM (0x40000400UL) /**< \brief (PM) APB Base Address */ macro
440 #define PM ((Pm *)0x40000400UL) /**< \brief (PM) APB Base Address */ macro
442 #define PM_INSTS { PM } /**< \brief (PM) Instances List */
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| A D | samd20j18.h | 374 #define PM (0x40000400UL) /**< \brief (PM) APB Base Address */ macro
440 #define PM ((Pm *)0x40000400UL) /**< \brief (PM) APB Base Address */ macro
442 #define PM_INSTS { PM } /**< \brief (PM) Instances List */
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