| /bsp/ft32/libraries/FT32F0xx/FT32F0xx_Driver/Inc/ |
| A D | ft32f0xx_comp.h | 188 #define IS_COMP_POL(POL) ( ((POL) == NCOMP_POL_NOT_INVERT) || \ argument
189 ((POL) == NCOMP_POL_INVERT) || \
190 ((POL) == PCOMP_POL_NOT_INVERT) || \
191 ((POL) == PCOMP_POL_INVERT) )
|
| A D | ft32f0xx_rtc.h | 377 #define IS_RTC_OUTPUT_POL(POL) (((POL) == RTC_OutputPolarity_High) || \ argument
378 ((POL) == RTC_OutputPolarity_Low))
|
| /bsp/nxp/lpc/lpc178x/drivers/ |
| A D | drv_glcd.c | 247 LPC_LCD->POL |=(1<<26); in GLCD_Init()
249 LPC_LCD->POL &= ~(1<<5); in GLCD_Init()
251 LPC_LCD->POL |= (1<<11); in GLCD_Init()
253 LPC_LCD->POL |= (1<<12); in GLCD_Init()
255 LPC_LCD->POL &= ~(1<<13); in GLCD_Init()
257 LPC_LCD->POL &= ~(1<<14); in GLCD_Init()
258 LPC_LCD->POL &= ~(0x3FF <<16); in GLCD_Init()
259 LPC_LCD->POL |= (C_GLCD_H_SIZE-1)<<16; in GLCD_Init()
|
| /bsp/mm32l07x/Libraries/MM32L0xx/HAL_lib/inc/ |
| A D | HAL_comp.h | 200 #define IS_COMP_OUTPUT_POL(POL) (((POL) == COMP_OutputPol_NonInverted) || \ argument
201 ((POL) == COMP_OutputPol_Inverted))
|
| /bsp/apm32/libraries/APM32F0xx_Library/APM32F0xx_StdPeriphDriver/src/ |
| A D | apm32f0xx_crc.c | 78 CRC->POL = 0x04C11DB7; in CRC_Reset()
123 CRC->POL = polynomialValue; in CRC_SetPolynomialValue()
|
| /bsp/tae32f5300/Libraries/TAE32F53xx_StdPeriph_Driver/inc/ |
| A D | tae32f53xx_ll_cmp.h | 528 #define IS_CMP_OUTPUT_POLARITY(POL) (((POL) == CMP_OUPUT_POLARITY_NON_INVERTED) … argument
529 ((POL) == CMP_OUPUT_POLARITY_INVERTED))
|
| /bsp/rm48x50/HALCoGen/include/ |
| A D | reg_gio.h | 42 uint32 POL; /**< 0x000C: Interrupt Polarity Register */ member
|
| /bsp/rv32m1_vega/rv32m1_sdk_riscv/devices/RV32M1/drivers/ |
| A D | fsl_tpm.c | 630 base->POL |= TPM_POL_POL0_MASK; in TPM_SetupQuadDecode()
634 base->POL &= ~TPM_POL_POL0_MASK; in TPM_SetupQuadDecode()
653 base->POL |= TPM_POL_POL1_MASK; in TPM_SetupQuadDecode()
657 base->POL &= ~TPM_POL_POL1_MASK; in TPM_SetupQuadDecode()
|
| /bsp/nv32f100x/lib/src/ |
| A D | etm.c | 690 pETM->POL &= ~(1 << u8ETM_Channel); in ETM_PolaritySet()
694 pETM->POL |= (1 << u8ETM_Channel); in ETM_PolaritySet()
863 pETM->POL = pConfig->pol; in ETM_Init()
911 pETM->POL = 0; in ETM_DeInit()
|
| /bsp/stm32/libraries/STM32L1xx_HAL/STM32L1xx_HAL_Driver/Inc/ |
| A D | stm32l1xx_hal_rtc.h | 258 #define IS_RTC_OUTPUT_POL(POL) (((POL) == RTC_OUTPUT_POLARITY_HIGH) || \ argument
259 ((POL) == RTC_OUTPUT_POLARITY_LOW))
|
| /bsp/n32/libraries/N32G4FR_Firmware_Library/n32g4fr_std_periph_driver/inc/ |
| A D | n32g4fr_rtc.h | 408 #define IS_RTC_OUTPUT_POL(POL) (((POL) == RTC_OUTPOL_HIGH) || ((POL) == RTC_OUTPOL_LOW)) argument
|
| /bsp/n32/libraries/N32G45x_Firmware_Library/n32g45x_std_periph_driver/inc/ |
| A D | n32g45x_rtc.h | 408 #define IS_RTC_OUTPUT_POL(POL) (((POL) == RTC_OUTPOL_HIGH) || ((POL) == RTC_OUTPOL_LOW)) argument
|
| /bsp/n32/libraries/N32WB452_Firmware_Library/n32wb452_std_periph_driver/inc/ |
| A D | n32wb452_rtc.h | 408 #define IS_RTC_OUTPUT_POL(POL) (((POL) == RTC_OUTPOL_HIGH) || ((POL) == RTC_OUTPOL_LOW)) argument
|
| /bsp/n32g452xx/Libraries/N32_Std_Driver/n32g45x_std_periph_driver/inc/ |
| A D | n32g45x_rtc.h | 408 #define IS_RTC_OUTPUT_POL(POL) (((POL) == RTC_OUTPOL_HIGH) || ((POL) == RTC_OUTPOL_LOW)) argument
|
| /bsp/hk32/libraries/HK32F0xx_StdPeriph_Driver/inc/ |
| A D | hk32f0xx_rtc.h | 391 #define IS_RTC_OUTPUT_POL(POL) (((POL) == RTC_OutputPolarity_High) || \ argument
392 ((POL) == RTC_OutputPolarity_Low))
|
| /bsp/n32/libraries/N32L43x_Firmware_Library/n32l43x_std_periph_driver/inc/ |
| A D | n32l43x_rtc.h | 408 #define IS_RTC_OUTPUT_POL(POL) (((POL) == RTC_OUTPOL_HIGH) || ((POL) == RTC_OUTPOL_LOW)) argument
|
| /bsp/n32/libraries/N32L40x_Firmware_Library/n32l40x_std_periph_driver/inc/ |
| A D | n32l40x_rtc.h | 408 #define IS_RTC_OUTPUT_POL(POL) (((POL) == RTC_OUTPOL_HIGH) || ((POL) == RTC_OUTPOL_LOW)) argument
|
| /bsp/n32/libraries/N32G43x_Firmware_Library/n32g43x_std_periph_driver/inc/ |
| A D | n32g43x_rtc.h | 408 #define IS_RTC_OUTPUT_POL(POL) (((POL) == RTC_OUTPOL_HIGH) || ((POL) == RTC_OUTPOL_LOW)) argument
|
| /bsp/rm48x50/HALCoGen/source/ |
| A D | gio.c | 146 gioREG->POL = 0U /* Bit 0 */ in gioInit()
|
| /bsp/nv32f100x/lib/inc/ |
| A D | etm.h | 710 pETM->POL = u8ChsPolValue; in ETM_SetChannelsPolarity()
728 return (pETM->POL); in ETM_GetChannelsPolarity()
|
| A D | NV32.h | 594 __IO uint32_t POL; /**< Channels Polarity, offset: 0x70 */ member
|
| /bsp/frdm-k64f/device/MK64F12/ |
| A D | fsl_ftm.c | 257 base->POL = config->chnlPolarity; in FTM_Init()
|
| /bsp/m16c62p/drivers/ |
| A D | iom16c62p.h | 429 unsigned char POL :1; /* Polarity select bit */ member
|
| /bsp/samd21/sam_d2x_asflib/sam0/utils/cmsis/samd21/include/component/ |
| A D | tcc.h | 1302 uint32_t POL:4; /*!< bit: 16..19 Channel x Polarity */ member
|
| A D | tcc_lighting.h | 1302 uint32_t POL:4; /*!< bit: 16..19 Channel x Polarity */ member
|