| /bsp/synwit/libraries/SWM320_CSL/SWM320_StdPeriph_Driver/ |
| A D | SWM320_port.c | 55 PORT->PORTA_SEL &= ~(0x03 << (n*2)); in PORT_Init()
58 PORT->PORTA_INEN &= ~(0x01 << n); in PORT_Init()
59 PORT->PORTA_INEN |= (digit_in_en << n); in PORT_Init()
77 PORT->PORTB_SEL &= ~(0x03 << (n*2)); in PORT_Init()
80 PORT->PORTB_INEN &= ~(0x01 << n); in PORT_Init()
81 PORT->PORTB_INEN |= (digit_in_en << n); in PORT_Init()
99 PORT->PORTC_SEL &= ~(0x03 << (n*2)); in PORT_Init()
102 PORT->PORTC_INEN &= ~(0x01 << n); in PORT_Init()
142 PORT->PORTM_INEN &= ~(0x01 << n); in PORT_Init()
177 PORT->PORTN_INEN &= ~(0x01 << n); in PORT_Init()
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| A D | SWM320_gpio.c | 54 PORT->PORTA_PULLU |= (0x01 << n); in GPIO_Init()
56 PORT->PORTA_PULLU &= ~(0x01 << n); in GPIO_Init()
73 PORT->PORTB_PULLD |= (0x01 << n); in GPIO_Init()
75 PORT->PORTB_PULLD &= ~(0x01 << n); in GPIO_Init()
92 PORT->PORTC_PULLU |= (0x01 << n); in GPIO_Init()
94 PORT->PORTC_PULLU &= ~(0x01 << n); in GPIO_Init()
111 PORT->PORTM_PULLU |= (0x01 << n); in GPIO_Init()
113 PORT->PORTM_PULLU &= ~(0x01 << n); in GPIO_Init()
130 PORT->PORTN_PULLD |= (0x01 << n); in GPIO_Init()
132 PORT->PORTN_PULLD &= ~(0x01 << n); in GPIO_Init()
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| /bsp/microchip/samd51-seeed-wio-terminal/bsp/hpl/port/ |
| A D | hpl_gpio_base.h | 47 hri_port_clear_DIR_reg(PORT, port, mask); in _gpio_set_direction()
54 hri_port_clear_DIR_reg(PORT, port, mask); in _gpio_set_direction()
56 hri_port_write_WRCONFIG_reg(PORT, in _gpio_set_direction()
63 hri_port_set_DIR_reg(PORT, port, mask); in _gpio_set_direction()
80 hri_port_set_OUT_reg(PORT, port, mask); in _gpio_set_level()
82 hri_port_clear_OUT_reg(PORT, port, mask); in _gpio_set_level()
91 hri_port_toggle_OUT_reg(PORT, port, mask); in _gpio_toggle_level()
125 hri_port_clear_DIR_reg(PORT, port, 1U << pin); in _gpio_set_pin_pull_mode()
127 hri_port_set_OUT_reg(PORT, port, 1U << pin); in _gpio_set_pin_pull_mode()
131 hri_port_clear_DIR_reg(PORT, port, 1U << pin); in _gpio_set_pin_pull_mode()
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| /bsp/microchip/same54/bsp/hpl/port/ |
| A D | hpl_gpio_base.h | 47 hri_port_clear_DIR_reg(PORT, port, mask); in _gpio_set_direction()
54 hri_port_clear_DIR_reg(PORT, port, mask); in _gpio_set_direction()
56 hri_port_write_WRCONFIG_reg(PORT, in _gpio_set_direction()
63 hri_port_set_DIR_reg(PORT, port, mask); in _gpio_set_direction()
80 hri_port_set_OUT_reg(PORT, port, mask); in _gpio_set_level()
82 hri_port_clear_OUT_reg(PORT, port, mask); in _gpio_set_level()
91 hri_port_toggle_OUT_reg(PORT, port, mask); in _gpio_toggle_level()
125 hri_port_clear_DIR_reg(PORT, port, 1U << pin); in _gpio_set_pin_pull_mode()
127 hri_port_set_OUT_reg(PORT, port, 1U << pin); in _gpio_set_pin_pull_mode()
131 hri_port_clear_DIR_reg(PORT, port, 1U << pin); in _gpio_set_pin_pull_mode()
[all …]
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| /bsp/microchip/samd51-adafruit-metro-m4/bsp/hpl/port/ |
| A D | hpl_gpio_base.h | 47 hri_port_clear_DIR_reg(PORT, port, mask); in _gpio_set_direction()
54 hri_port_clear_DIR_reg(PORT, port, mask); in _gpio_set_direction()
56 hri_port_write_WRCONFIG_reg(PORT, in _gpio_set_direction()
63 hri_port_set_DIR_reg(PORT, port, mask); in _gpio_set_direction()
80 hri_port_set_OUT_reg(PORT, port, mask); in _gpio_set_level()
82 hri_port_clear_OUT_reg(PORT, port, mask); in _gpio_set_level()
91 hri_port_toggle_OUT_reg(PORT, port, mask); in _gpio_toggle_level()
125 hri_port_clear_DIR_reg(PORT, port, 1U << pin); in _gpio_set_pin_pull_mode()
127 hri_port_set_OUT_reg(PORT, port, 1U << pin); in _gpio_set_pin_pull_mode()
131 hri_port_clear_DIR_reg(PORT, port, 1U << pin); in _gpio_set_pin_pull_mode()
[all …]
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| /bsp/nv32f100x/lib/src/ |
| A D | gpio.c | 106 …(sGpioType == GPIO_PinInput_InternalPullup)?(PORT->PUEL |= u32PinMask):(PORT->PUEL &= ~u32PinMask); in GPIO_Init()
109 …(sGpioType == GPIO_PinInput_InternalPullup)?(PORT->PUEH |= u32PinMask):(PORT->PUEH &= ~u32PinMask); in GPIO_Init()
120 …(sGpioType == GPIO_PinInput_InternalPullup)?(PORT->PUEL |= u32PinMask):(PORT->PUEL &= ~u32PinMask); in GPIO_Init()
131 …(sGpioType == GPIO_PinInput_InternalPullup)?(PORT->PUE0 |= u32PinMask):(PORT->PUE0 &= ~u32PinMask); in GPIO_Init()
134 …(sGpioType == GPIO_PinInput_InternalPullup)?(PORT->PUE1 |= u32PinMask):(PORT->PUE1 &= ~u32PinMask); in GPIO_Init()
137 …(sGpioType == GPIO_PinInput_InternalPullup)?(PORT->PUE2 |= u32PinMask):(PORT->PUE2 &= ~u32PinMask); in GPIO_Init()
148 PORT->HDRVE |= PORT_HDRVE_PTC5_MASK; in GPIO_Init()
152 PORT->HDRVE |= PORT_HDRVE_PTC1_MASK; in GPIO_Init()
156 PORT->HDRVE |= PORT_HDRVE_PTB5_MASK; in GPIO_Init()
165 PORT->HDRVE |= PORT_HDRVE_PTB4_MASK; in GPIO_Init()
[all …]
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| A D | kbi.c | 140 PORT->PUEL |= (1<<u8PinPos); /* enable pullup for the pin */ in KBI_Init()
146 PORT->PUE0 |= (1<<u8PinPos); /*enable pullup for the pin */ in KBI_Init()
152 PORT->PUE1 |= (1<<u8PinPos); /*enable pullup for the pin */ in KBI_Init()
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| /bsp/microchip/samc21/bsp/hpl/port/ |
| A D | hpl_gpio_base.h | 56 hri_port_write_WRCONFIG_reg(PORT, in _gpio_set_direction()
105 tmp = hri_port_read_IN_reg(PORT, port) & ~dir_tmp; in _gpio_get_level()
121 hri_port_clear_PINCFG_PULLEN_bit(PORT, port, pin); in _gpio_set_pin_pull_mode()
126 hri_port_set_PINCFG_PULLEN_bit(PORT, port, pin); in _gpio_set_pin_pull_mode()
132 hri_port_set_PINCFG_PULLEN_bit(PORT, port, pin); in _gpio_set_pin_pull_mode()
151 hri_port_write_PINCFG_PMUXEN_bit(PORT, port, pin, false); in _gpio_set_pin_function()
154 hri_port_write_PINCFG_PMUXEN_bit(PORT, port, pin, true); in _gpio_set_pin_function()
158 hri_port_write_PMUX_PMUXO_bf(PORT, port, pin >> 1, function & 0xffff); in _gpio_set_pin_function()
161 hri_port_write_PMUX_PMUXE_bf(PORT, port, pin >> 1, function & 0xffff); in _gpio_set_pin_function()
168 hri_port_set_EVCTRL_reg(PORT, 0, CONF_PORTA_EVCTRL); in _port_event_init()
[all …]
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| /bsp/microchip/saml10/bsp/hpl/port/ |
| A D | hpl_gpio_base.h | 48 hri_port_write_WRCONFIG_reg(PORT, port, PORT_WRCONFIG_WRPINCFG | (mask & 0xffff)); in _gpio_set_direction()
56 hri_port_write_WRCONFIG_reg(PORT, in _gpio_set_direction()
105 tmp = hri_port_read_IN_reg(PORT, port) & ~dir_tmp; in _gpio_get_level()
121 hri_port_clear_PINCFG_PULLEN_bit(PORT, port, pin); in _gpio_set_pin_pull_mode()
126 hri_port_set_PINCFG_PULLEN_bit(PORT, port, pin); in _gpio_set_pin_pull_mode()
132 hri_port_set_PINCFG_PULLEN_bit(PORT, port, pin); in _gpio_set_pin_pull_mode()
151 hri_port_write_PINCFG_PMUXEN_bit(PORT, port, pin, false); in _gpio_set_pin_function()
154 hri_port_write_PINCFG_PMUXEN_bit(PORT, port, pin, true); in _gpio_set_pin_function()
158 hri_port_write_PMUX_PMUXO_bf(PORT, port, pin >> 1, function & 0xffff); in _gpio_set_pin_function()
161 hri_port_write_PMUX_PMUXE_bf(PORT, port, pin >> 1, function & 0xffff); in _gpio_set_pin_function()
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| /bsp/nuvoton/libraries/ma35/rtt_port/ |
| A D | drv_gpio.c | 131 GPIO_T *PORT; in nu_gpio_mode() local
136 PORT = (GPIO_T *)(GPIOA_BASE + (NU_GET_PORT(pin) * PORT_OFFSET)); in nu_gpio_mode()
140 GPIO_SetMode(PORT, NU_GET_PIN_MASK(NU_GET_PINS(pin)), GPIO_MODE_INPUT); in nu_gpio_mode()
252 GPIO_T *PORT = (GPIO_T *)param; in nu_gpio_isr() local
253 rt_uint32_t port_idx = ((rt_uint32_t)PORT - GPIOA_BASE) / PORT_OFFSET ; in nu_gpio_isr()
255 int_status = PORT->INTSRC; in nu_gpio_isr()
257 PORT->INTSRC = int_status; in nu_gpio_isr()
262 GPIO_T *PORT; in nu_gpio_irq_enable() local
281 PORT = (GPIO_T *)(GPIOA_BASE + (NU_GET_PORT(pin) * PORT_OFFSET)); in nu_gpio_irq_enable()
300 GPIO_EnableInt(PORT, NU_GET_PINS(pin), u32IntAttribs); in nu_gpio_irq_enable()
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| A D | drv_sspcc.h | 25 #define SSPCC_SET_GPIO_REALM(PORT, PIN, REALM) \ argument
27 rt_kprintf("Set %s%s realm to %s(%d)\n", #PORT, #PIN, #REALM, REALM); \
28 SSPCC_SetRealm_GPIO((uint32_t)PORT, PIN, REALM); \
29 …et %s%s realm is %d ....%s\n", #PORT, #PIN, SSPCC_GetRealm_GPIO((uint32_t)PORT, PIN), (SSPCC_GetRe…
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| /bsp/nuvoton/libraries/nuc980/rtt_port/ |
| A D | drv_gpio.c | 132 GPIO_T *PORT; in nu_gpio_mode() local
137 PORT = (GPIO_T *)(PA_BA + (NU_GET_PORT(pin) * PORT_OFFSET)); in nu_gpio_mode()
141 GPIO_SetMode(PORT, NU_GET_PIN_MASK(NU_GET_PINS(pin)), GPIO_MODE_INPUT); in nu_gpio_mode()
253 GPIO_T *PORT = (GPIO_T *)param; in nu_gpio_isr() local
254 rt_uint32_t port_idx = ((rt_uint32_t)PORT - PA_BA) / PORT_OFFSET ; in nu_gpio_isr()
256 int_status = PORT->INTSRC; in nu_gpio_isr()
258 PORT->INTSRC = int_status; in nu_gpio_isr()
263 GPIO_T *PORT; in nu_gpio_irq_enable() local
282 PORT = (GPIO_T *)(PA_BA + (NU_GET_PORT(pin) * PORT_OFFSET)); in nu_gpio_irq_enable()
301 GPIO_EnableInt(PORT, NU_GET_PINS(pin), u32IntAttribs); in nu_gpio_irq_enable()
[all …]
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| /bsp/nuvoton/libraries/n9h30/rtt_port/ |
| A D | drv_gpio.c | 149 GPIO_PORT PORT; in nu_gpio_mode() local
154 PORT = (GPIO_PORT)(GPIOA + (NU_GET_PORT(pin) * PORT_OFFSET)); in nu_gpio_mode()
183 GPIO_PORT PORT; in nu_gpio_write() local
188 PORT = (GPIO_PORT)(GPIOA + (NU_GET_PORT(pin) * PORT_OFFSET)); in nu_gpio_write()
191 GPIO_SetBit(PORT, NU_GET_PIN_MASK(NU_GET_PINS(pin))); in nu_gpio_write()
193 GPIO_ClrBit(PORT, NU_GET_PIN_MASK(NU_GET_PINS(pin))); in nu_gpio_write()
198 GPIO_PORT PORT; in nu_gpio_read() local
205 PORT = (GPIO_PORT)(GPIOA + (NU_GET_PORT(pin) * PORT_OFFSET)); in nu_gpio_read()
207 return GPIO_ReadBit(PORT, NU_GET_PIN_MASK(NU_GET_PINS(pin))); in nu_gpio_read()
304 GPIO_PORT PORT; in nu_gpio_irq_enable() local
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| /bsp/synwit/libraries/SWM320_drivers/ |
| A D | drv_sram.c | 29 PORT->PORTP_SEL0 = 0xAAAAAAAA; //PP0-23 => ADDR0-23 in rt_hw_sram_init()
30 PORT->PORTP_SEL1 = 0xAAAA; in rt_hw_sram_init()
32 PORT->PORTM_SEL0 = 0xAAAAAAAA; //PM0-15 => DATA15-0 in rt_hw_sram_init()
33 PORT->PORTM_INEN = 0xFFFF; in rt_hw_sram_init()
35 …PORT->PORTM_SEL1 = 0xAAA; //PM16 => OEN,PM17 => WEN,PM18 => NORFL_CSN,PM19 => SDRAM_CSN,PM20 => SR… in rt_hw_sram_init()
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| A D | drv_nor_flash.c | 84 PORT->PORTP_SEL0 = 0xAAAAAAAA; //PP0-23 => ADDR0-23 in swm_norflash_init()
85 PORT->PORTP_SEL1 = 0xAAAA; in swm_norflash_init()
87 PORT->PORTM_SEL0 = 0xAAAAAAAA; //PM0-15 => DATA15-0 in swm_norflash_init()
88 PORT->PORTM_INEN = 0xFFFF; in swm_norflash_init()
90 …PORT->PORTM_SEL1 = 0xAAA; //PM16 => OEN、PM17 => WEN、PM18 => NORFL_CSN、PM19 => SDRAM_CSN、PM20 => SR… in swm_norflash_init()
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| /bsp/nuvoton/libraries/m460/rtt_port/ |
| A D | drv_gpio.c | 134 GPIO_T *PORT; in nu_gpio_mode() local
139 PORT = (GPIO_T *)(GPIOA_BASE + (NU_GET_PORT(pin) * PORT_OFFSET)); in nu_gpio_mode()
143 GPIO_SetMode(PORT, NU_GET_PIN_MASK(NU_GET_PINS(pin)), GPIO_MODE_INPUT); in nu_gpio_mode()
148 GPIO_SetMode(PORT, NU_GET_PIN_MASK(NU_GET_PINS(pin)), GPIO_MODE_INPUT); in nu_gpio_mode()
153 GPIO_SetMode(PORT, NU_GET_PIN_MASK(NU_GET_PINS(pin)), GPIO_MODE_OUTPUT); in nu_gpio_mode()
157 GPIO_SetMode(PORT, NU_GET_PIN_MASK(NU_GET_PINS(pin)), GPIO_MODE_INPUT); in nu_gpio_mode()
162 GPIO_SetMode(PORT, NU_GET_PIN_MASK(NU_GET_PINS(pin)), GPIO_MODE_OPEN_DRAIN); in nu_gpio_mode()
254 GPIO_T *PORT; in nu_gpio_irq_enable() local
272 PORT = (GPIO_T *)(GPIOA_BASE + (NU_GET_PORT(pin) * PORT_OFFSET)); in nu_gpio_irq_enable()
289 GPIO_EnableInt(PORT, NU_GET_PINS(pin), u32IntAttribs); in nu_gpio_irq_enable()
[all …]
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| /bsp/nuvoton/libraries/m480/rtt_port/ |
| A D | drv_gpio.c | 134 GPIO_T *PORT; in nu_gpio_mode() local
139 PORT = (GPIO_T *)(GPIOA_BASE + (NU_GET_PORT(pin) * PORT_OFFSET)); in nu_gpio_mode()
143 GPIO_SetMode(PORT, NU_GET_PIN_MASK(NU_GET_PINS(pin)), GPIO_MODE_INPUT); in nu_gpio_mode()
148 GPIO_SetMode(PORT, NU_GET_PIN_MASK(NU_GET_PINS(pin)), GPIO_MODE_INPUT); in nu_gpio_mode()
153 GPIO_SetMode(PORT, NU_GET_PIN_MASK(NU_GET_PINS(pin)), GPIO_MODE_OUTPUT); in nu_gpio_mode()
157 GPIO_SetMode(PORT, NU_GET_PIN_MASK(NU_GET_PINS(pin)), GPIO_MODE_INPUT); in nu_gpio_mode()
162 GPIO_SetMode(PORT, NU_GET_PIN_MASK(NU_GET_PINS(pin)), GPIO_MODE_OPEN_DRAIN); in nu_gpio_mode()
254 GPIO_T *PORT; in nu_gpio_irq_enable() local
272 PORT = (GPIO_T *)(GPIOA_BASE + (NU_GET_PORT(pin) * PORT_OFFSET)); in nu_gpio_irq_enable()
289 GPIO_EnableInt(PORT, NU_GET_PINS(pin), u32IntAttribs); in nu_gpio_irq_enable()
[all …]
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| /bsp/nuvoton/libraries/m2354/rtt_port/ |
| A D | drv_gpio.c | 134 GPIO_T *PORT; in nu_gpio_mode() local
139 PORT = (GPIO_T *)(GPIOA_BASE + (NU_GET_PORT(pin) * PORT_OFFSET)); in nu_gpio_mode()
143 GPIO_SetMode(PORT, NU_GET_PIN_MASK(NU_GET_PINS(pin)), GPIO_MODE_INPUT); in nu_gpio_mode()
148 GPIO_SetMode(PORT, NU_GET_PIN_MASK(NU_GET_PINS(pin)), GPIO_MODE_INPUT); in nu_gpio_mode()
153 GPIO_SetMode(PORT, NU_GET_PIN_MASK(NU_GET_PINS(pin)), GPIO_MODE_OUTPUT); in nu_gpio_mode()
157 GPIO_SetMode(PORT, NU_GET_PIN_MASK(NU_GET_PINS(pin)), GPIO_MODE_INPUT); in nu_gpio_mode()
162 GPIO_SetMode(PORT, NU_GET_PIN_MASK(NU_GET_PINS(pin)), GPIO_MODE_OPEN_DRAIN); in nu_gpio_mode()
254 GPIO_T *PORT; in nu_gpio_irq_enable() local
272 PORT = (GPIO_T *)(GPIOA_BASE + (NU_GET_PORT(pin) * PORT_OFFSET)); in nu_gpio_irq_enable()
289 GPIO_EnableInt(PORT, NU_GET_PINS(pin), u32IntAttribs); in nu_gpio_irq_enable()
[all …]
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| /bsp/hc32l196/drivers/ |
| A D | drv_gpio.h | 21 #define GET_PIN(PORT, PIN) (((rt_uint16_t)__HC_PORT_ADJUST(__HC_PORT(PORT)) / 4) + PIN) argument
22 #define __GET_PIN(PORT, PIN) (((rt_uint16_t)__HC_PORT_ADJUST(PORT) / 4) + PIN) argument
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| /bsp/nuvoton/libraries/m031/rtt_port/ |
| A D | drv_gpio.c | 132 GPIO_T *PORT; in nu_gpio_mode() local
137 PORT = (GPIO_T *)(PA_BASE + (NU_GET_PORT(pin) * PORT_OFFSET)); in nu_gpio_mode()
141 GPIO_SetMode(PORT, NU_GET_PIN_MASK(NU_GET_PINS(pin)), GPIO_MODE_OUTPUT); in nu_gpio_mode()
145 GPIO_SetMode(PORT, NU_GET_PIN_MASK(NU_GET_PINS(pin)), GPIO_MODE_INPUT); in nu_gpio_mode()
149 GPIO_SetMode(PORT, NU_GET_PIN_MASK(NU_GET_PINS(pin)), GPIO_MODE_OPEN_DRAIN); in nu_gpio_mode()
154 GPIO_SetMode(PORT, NU_GET_PIN_MASK(NU_GET_PINS(pin)), GPIO_MODE_INPUT); in nu_gpio_mode()
158 GPIO_SetMode(PORT, NU_GET_PIN_MASK(NU_GET_PINS(pin)), GPIO_MODE_INPUT); in nu_gpio_mode()
255 GPIO_T *PORT; in nu_gpio_irq_enable() local
273 PORT = (GPIO_T *)(PA_BASE + (NU_GET_PORT(pin) * PORT_OFFSET)); in nu_gpio_irq_enable()
290 GPIO_EnableInt(PORT, NU_GET_PINS(pin), u32IntAttribs); in nu_gpio_irq_enable()
[all …]
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| /bsp/renesas/ra4e2-eco/ra/fsp/src/bsp/mcu/all/ |
| A D | bsp_io.h | 350 return R_PFS->PORT[pin >> 8].PIN[pin & BSP_IO_PRV_8BIT_MASK].PmnPFS_b.PIDR; in R_BSP_PinRead()
363 uint32_t pfs_bits = R_PFS->PORT[pin >> 8].PIN[pin & BSP_IO_PRV_8BIT_MASK].PmnPFS; in R_BSP_PinWrite()
369 …R_PFS->PORT[pin >> 8].PIN[pin & BSP_IO_PRV_8BIT_MASK].PmnPFS = (uint16_t) (BSP_IO_PFS_PDR_OUTPUT |… in R_BSP_PinWrite()
371 R_PFS->PORT[pin >> 8].PIN[pin & BSP_IO_PRV_8BIT_MASK].PmnPFS = (BSP_IO_PFS_PDR_OUTPUT | lvl); in R_BSP_PinWrite()
386 R_PFS->PORT[pin >> 8].PIN[pin & BSP_IO_PRV_8BIT_MASK].PmnPFS = (uint16_t) cfg; in R_BSP_PinCfg()
388 R_PFS->PORT[pin >> 8].PIN[pin & BSP_IO_PRV_8BIT_MASK].PmnPFS = cfg; in R_BSP_PinCfg()
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| /bsp/renesas/ra6e2-fpb/ra/fsp/src/bsp/mcu/all/ |
| A D | bsp_io.h | 349 return R_PFS->PORT[pin >> 8].PIN[pin & BSP_IO_PRV_8BIT_MASK].PmnPFS_b.PIDR; in R_BSP_PinRead()
362 uint32_t pfs_bits = R_PFS->PORT[pin >> 8].PIN[pin & BSP_IO_PRV_8BIT_MASK].PmnPFS; in R_BSP_PinWrite()
368 …R_PFS->PORT[pin >> 8].PIN[pin & BSP_IO_PRV_8BIT_MASK].PmnPFS = (uint16_t) (BSP_IO_PFS_PDR_OUTPUT |… in R_BSP_PinWrite()
370 R_PFS->PORT[pin >> 8].PIN[pin & BSP_IO_PRV_8BIT_MASK].PmnPFS = (BSP_IO_PFS_PDR_OUTPUT | lvl); in R_BSP_PinWrite()
385 R_PFS->PORT[pin >> 8].PIN[pin & BSP_IO_PRV_8BIT_MASK].PmnPFS = (uint16_t) cfg; in R_BSP_PinCfg()
387 R_PFS->PORT[pin >> 8].PIN[pin & BSP_IO_PRV_8BIT_MASK].PmnPFS = cfg; in R_BSP_PinCfg()
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| /bsp/hc32/libraries/hc32_drivers/ |
| A D | drv_gpio.h | 20 #define GET_PIN(PORT, PIN) (rt_base_t)(((rt_uint16_t)__HC_PORT(PORT) * 16) + PIN) argument
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| /bsp/bouffalo_lab/ |
| A D | bouffalo_flash_cube.sh | 3 PORT=$2
59 …OL_NAME --interface=uart --baudrate=2000000 --chipname=$CHIPNAME --config=$CONFIG_FILE --port=$PORT
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| /bsp/samd21/sam_d2x_asflib/sam0/drivers/port/ |
| A D | port.h | 188 # define PORTA PORT->Group[0]
194 # define PORTB PORT->Group[1]
200 # define PORTC PORT->Group[2]
206 # define PORTD PORT->Group[3]
|