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Searched refs:PS (Results 1 – 25 of 28) sorted by relevance

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/bsp/hpmicro/libraries/hpm_sdk/drivers/src/
A Dhpm_pdma_drv.c300 ptr->PS[pdma_plane_src].BUF = PDMA_PS_BUF_ADDR_SET((uint32_t) plane_src->buffer); in pdma_config_planes()
301 ptr->PS[pdma_plane_src].PITCH = PDMA_PS_PITCH_BYTELEN_SET(pitch); in pdma_config_planes()
302 ptr->PS[pdma_plane_src].BKGD = PDMA_PS_BKGD_COLOR_SET(plane_src->background); in pdma_config_planes()
303 ptr->PS[pdma_plane_src].SCALE = PDMA_PS_SCALE_X_SET(plane_src->x_scale) in pdma_config_planes()
305 ptr->PS[pdma_plane_src].OFFSET = PDMA_PS_OFFSET_X_SET(plane_src->x_offset) in pdma_config_planes()
309 ptr->PS[pdma_plane_src].ORG = PDMA_PS_ORG_HIGHT_SET(plane_src->height) in pdma_config_planes()
333 ptr->PS[pdma_plane_dst].PITCH = PDMA_PS_PITCH_BYTELEN_SET(pitch); in pdma_config_planes()
334 ptr->PS[pdma_plane_dst].BKGD = PDMA_PS_BKGD_COLOR_SET(plane_dst->background); in pdma_config_planes()
335 ptr->PS[pdma_plane_dst].SCALE = PDMA_PS_SCALE_X_SET(plane_dst->x_scale) in pdma_config_planes()
337 ptr->PS[pdma_plane_dst].OFFSET = PDMA_PS_OFFSET_X_SET(plane_dst->x_offset) in pdma_config_planes()
[all …]
/bsp/zynqmp-a53-dfzu2eg/
A DREADME.md5 正点原子 DFZU2EG MPSoC 开发板采用Xilinx的Zynq UltraScale+ MPSoC芯片作为主控芯片。它主要分为PS和PL两部分,在PS部分中主要由Arm Cortex A53…
89 可以使用开发板出厂自带的uboot(EMMC)来加载RTT程序,将网线连接到开发板的PS网口,然后在uboot控制台输入下列命令:
/bsp/zynqmp-r5-axu4ev/
A DREADME_zh.md17 …EV 芯片 ZU4EV 的解决方案,它采用Processing System(PS)+Programmable Logic(PL)技术将四核ARM Cortex-A53 和FPGA 可编程逻辑集成…
/bsp/allwinner/libraries/sunxi-hal/hal/source/usb/storage/include/
A DScsi2.h357 unsigned char PS : 1; member
374 unsigned char PS : 1; member
390 unsigned char PS : 1; member
424 unsigned char PS : 1; member
/bsp/mm32f327x/Libraries/MM32F327x/Include/
A Dreg_iwdg.h55 …__IO u32 PS; ///< Prescaler count Re… member
/bsp/hpmicro/libraries/hpm_sdk/drivers/inc/
A Dhpm_pdma_drv.h449 ptr->PS[plane_index].CLRKEY_LOW = PDMA_PS_CLRKEY_LOW_LIMIT_SET(key_low); in pdma_set_plane_colorkey()
450 ptr->PS[plane_index].CLRKEY_HIGH = PDMA_PS_CLRKEY_HIGH_LIMIT_SET(key_high); in pdma_set_plane_colorkey()
/bsp/CME_M7/StdPeriph_Driver/src/
A Dcmem7_eth.c199 ETH->CONFIG_b.PS = ETH_LINE_SPEED_10_100M_BPS; in mac_SetConfig()
202 ETH->CONFIG_b.PS = ETH_LINE_SPEED_10_100M_BPS; in mac_SetConfig()
205 ETH->CONFIG_b.PS = ETH_LINE_SPEED_1000M_BPS; in mac_SetConfig()
A Dcmem7_usb.c147 hprt.HPRT_b.PS = 1; in USB_HostSuspendPort()
/bsp/avr32/at32uc3a0256/
A DREADME.md77 ![VGA Output, PS/2 Input, Audio Output](figures/Mizar32_VGA_Propeller_Module.jpg)
144 connect the shield to a VGA monitor and a PS/2 keyboard.
/bsp/CME_M7/StdPeriph_Driver/inc/
A Dcmem7_usb.h144 …__IO uint32_t PS : 1; /*!< Sets this bit to put this port in Suspend mode … member
A Dcmem7.h2801 …__IO uint32_t PS : 1; /*!< the Ethernet line speed … member
3317 …__I uint32_t PS : 4; /*!< the status of the received packet … member
3330 …__I uint32_t PS : 4; /*!< the status of the received packet … member
3669 …__IO uint32_t PS : 1; /*!< Sets this bit to put this port in Suspend mode … member
/bsp/microchip/same70/bsp/same70b/include/component/
A Dsmc.h168 … uint32_t PS:2; /**< bit: 28..29 Page Size */ member
A Dspi.h95 … uint32_t PS:1; /**< bit: 1 Peripheral Select */ member
/bsp/renesas/docs/
A DRA_Series_Uses_FSP_to_Configure_Peripheral_Drivers.md20 PS:The above related operations can also be found in the FSP documentation.
42 **PS: The peripheral adding steps in the document are instructions for individual configuration. Th…
/bsp/tm4c129x/libraries/startup/
A Dstartup_rvmdk.S205 DCD IntDefaultHandler ; HIM PS/2 0
/bsp/hpmicro/libraries/hpm_sdk/soc/HPM6700/ip/
A Dhpm_pdma_regs.h37 } PS[2]; member
/bsp/hpmicro/libraries/hpm_sdk/soc/HPM6800/ip/
A Dhpm_pdma_regs.h37 } PS[2]; member
/bsp/renesas/rzt2m_rsk/rzt/fsp/src/bsp/cmsis/Device/RENESAS/Include/
A DR9A07G074.h5929 …__IOM uint32_t PS : 1; /*!< [15..15] Port Select … member
9412 …__IOM uint32_t PS : 14; /*!< [13..0] Periodic list processing start time (PeriodicStart) … member
A DR9A07G075.h6210 …__IOM uint32_t PS : 1; /*!< [15..15] Port Select … member
17831 …__IOM uint32_t PS : 14; /*!< [13..0] Periodic list processing start time (PeriodicStart) … member
/bsp/mm32/libraries/MM32F3270_HAL/CMSIS/Device/MM32/MM32F3277/Include/
A Dmm32f3277g.h4672 …__IO uint32_t PS; ///< Divide count re… member
/bsp/renesas/rzn2l_rsk/rzn/fsp/src/bsp/cmsis/Device/RENESAS/Include/
A DR9A07G084.h6217 …__IOM uint32_t PS : 1; /*!< [15..15] Port Select … member
23293 …__IOM uint32_t PS : 14; /*!< [13..0] Periodic list processing start time (PeriodicStart) … member
/bsp/renesas/ra2l1-cpk/ra/fsp/src/bsp/cmsis/Device/RENESAS/Include/
A Drenesas.h2814 …__IOM uint8_t PS; /*!< (@ 0x00000002) Plus Input Select Register … member
8457 …__IM uint32_t PS : 1; /*!< [15..15] CTSU Mutual Capacitance Status Flag … member
/bsp/renesas/ra6m4-cpk/ra/fsp/src/bsp/cmsis/Device/RENESAS/Include/
A Drenesas.h2814 …__IOM uint8_t PS; /*!< (@ 0x00000002) Plus Input Select Register … member
8457 …__IM uint32_t PS : 1; /*!< [15..15] CTSU Mutual Capacitance Status Flag … member
/bsp/renesas/ra6m4-iot/ra/fsp/src/bsp/cmsis/Device/RENESAS/Include/
A Drenesas.h2814 …__IOM uint8_t PS; /*!< (@ 0x00000002) Plus Input Select Register … member
8457 …__IM uint32_t PS : 1; /*!< [15..15] CTSU Mutual Capacitance Status Flag … member
/bsp/renesas/ra6m3-ek/ra/fsp/src/bsp/cmsis/Device/RENESAS/Include/
A Drenesas.h2814 …__IOM uint8_t PS; /*!< (@ 0x00000002) Plus Input Select Register … member
8457 …__IM uint32_t PS : 1; /*!< [15..15] CTSU Mutual Capacitance Status Flag … member

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