Searched refs:PWMCFG (Results 1 – 8 of 8) sorted by relevance
250 addr->PWMCFG |= 0x00000003; /* PWM0 output enable */ in drv_pwm_start()254 addr->PWMCFG |= 0x0000000C; /* PWM1 output enable */ in drv_pwm_start()258 addr->PWMCFG |= 0x00000030; /* PWM2 output enable */ in drv_pwm_start()262 addr->PWMCFG |= 0x000000C0; /* PWM3 output enable */ in drv_pwm_start()266 addr->PWMCFG |= 0x00000300; /* PWM4 output enable */ in drv_pwm_start()270 addr->PWMCFG |= 0x00000C00; /* PWM5 output enable */ in drv_pwm_start()290 addr->PWMCFG &= ~0x00000003; /* PWM0 output disable */ in drv_pwm_stop()294 addr->PWMCFG &= ~0x0000000C; /* PWM1 output disable */ in drv_pwm_stop()298 addr->PWMCFG &= ~0x00000030; /* PWM2 output disable */ in drv_pwm_stop()302 addr->PWMCFG &= ~0x000000C0; /* PWM3 output disable */ in drv_pwm_stop()[all …]
48 __IOM uint32_t PWMCFG; /* Offset: 0x000 (R/W) PWM configure register */ member
225 pwm_x->PWMCFG[i] = 0; in pwm_deinit()757 pwm_x->PWMCFG[index] &= ~PWM_PWMCFG_OEN_MASK; in pwm_disable_output()768 pwm_x->PWMCFG[index] |= PWM_PWMCFG_OEN_MASK; in pwm_enable_output()814 pwm_x->PWMCFG[index] |= PWM_PWMCFG_OEN_MASK | PWM_PWMCFG_FRCSRCSEL_MASK in pwm_enable_pwm_sw_force_output()826 pwm_x->PWMCFG[index] &= ~PWM_PWMCFG_FRCSRCSEL_MASK; in pwm_disable_pwm_sw_force_output()842 pwm_x->PWMCFG[index] = PWM_PWMCFG_OEN_SET(config->enable_output) in pwm_config_pwm()
95 pwm_x->PWMCFG[pwm_index] &= ~PWM_PWMCFG_OEN_MASK; in pwm_setup_waveform_in_pair()96 pwm_x->PWMCFG[pwm_index + 1] &= ~PWM_PWMCFG_OEN_MASK; in pwm_setup_waveform_in_pair()
39 __RW uint32_t PWMCFG[8]; /* 0x200 - 0x21C: PWM channel configure register */ member
42 __RW uint32_t PWMCFG[8]; /* 0x200 - 0x21C: PWM channel configure register */ member
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