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Searched refs:PWM_PCGR (Results 1 – 5 of 5) sorted by relevance

/bsp/allwinner/libraries/sunxi-hal/hal/source/pwm/
A Dhal_pwm.c198 unsigned long reg_addr = PWM_BASE + PWM_PCGR; in hal_pwm_enable_clk_gating()
426 temp = hal_readl(PWM_BASE + PWM_PCGR); in hal_pwm_control()
428 hal_writel(temp, PWM_BASE + PWM_PCGR); in hal_pwm_control()
495 value = hal_readl(PWM_BASE + PWM_PCGR); in hal_pwm_control()
497 hal_writel(value, PWM_BASE + PWM_PCGR); in hal_pwm_control()
/bsp/allwinner/libraries/sunxi-hal/include/hal/sun8i/
A Dpwm-sun8iw19.h56 #define PWM_PCGR 0X40 /*PWM CLOCK Gating Register 0X40*/ macro
/bsp/allwinner/libraries/sunxi-hal/hal/source/pwm/platform/
A Dpwm_sun8iw18.h56 #define PWM_PCGR 0X20 /*PWM CLOCK Gating Register 0X40*/ macro
A Dpwm_sun8iw19.h56 #define PWM_PCGR 0X40 /*PWM CLOCK Gating Register 0X40*/ macro
A Dpwm_sun8iw20.h56 #define PWM_PCGR 0X40 /*PWM CLOCK Gating Register 0X40*/ macro

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