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Searched refs:PWR_CSR_SBF_Pos (Results 1 – 25 of 26) sorted by relevance

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/bsp/mm32f327x/Libraries/MM32F327x/Include/
A Dreg_pwr.h103 #define PWR_CSR_SBF_Pos (1) macro
104 #define PWR_CSR_SBF (0x01U << PWR_CSR_SBF_Pos) ///< Standby Flag
/bsp/hk32/libraries/HK32F0xx_StdPeriph_Driver/CMSIS/HK32F0xx/Include/
A Dhk32f030x4x6x8.h2840 #define PWR_CSR_SBF_Pos (1U) macro
2841 #define PWR_CSR_SBF_Msk (0x1U << PWR_CSR_SBF_Pos) /*!< 0x00000002 */
A Dhk32f031x4x6.h2904 #define PWR_CSR_SBF_Pos (1U) macro
2905 #define PWR_CSR_SBF_Msk (0x1U << PWR_CSR_SBF_Pos) /*!< 0x00000002 */
A Dhk32f04ax4x6x8.h2835 #define PWR_CSR_SBF_Pos (1U) macro
2836 #define PWR_CSR_SBF_Msk (0x1U << PWR_CSR_SBF_Pos) /*!< 0x00000002 */
/bsp/stm32/libraries/STM32L1xx_HAL/CMSIS/Device/ST/STM32L1xx/Include/
A Dstm32l100xb.h3798 #define PWR_CSR_SBF_Pos (1U) macro
3799 #define PWR_CSR_SBF_Msk (0x1UL << PWR_CSR_SBF_Pos) /*!< 0x00000002 */
A Dstm32l100xba.h3804 #define PWR_CSR_SBF_Pos (1U) macro
3805 #define PWR_CSR_SBF_Msk (0x1UL << PWR_CSR_SBF_Pos) /*!< 0x00000002 */
A Dstm32l151xb.h3683 #define PWR_CSR_SBF_Pos (1U) macro
3684 #define PWR_CSR_SBF_Msk (0x1UL << PWR_CSR_SBF_Pos) /*!< 0x00000002 */
A Dstm32l151xba.h3692 #define PWR_CSR_SBF_Pos (1U) macro
3693 #define PWR_CSR_SBF_Msk (0x1UL << PWR_CSR_SBF_Pos) /*!< 0x00000002 */
A Dstm32l152xb.h3816 #define PWR_CSR_SBF_Pos (1U) macro
3817 #define PWR_CSR_SBF_Msk (0x1UL << PWR_CSR_SBF_Pos) /*!< 0x00000002 */
A Dstm32l152xba.h3810 #define PWR_CSR_SBF_Pos (1U) macro
3811 #define PWR_CSR_SBF_Msk (0x1UL << PWR_CSR_SBF_Pos) /*!< 0x00000002 */
A Dstm32l100xc.h3906 #define PWR_CSR_SBF_Pos (1U) macro
3907 #define PWR_CSR_SBF_Msk (0x1UL << PWR_CSR_SBF_Pos) /*!< 0x00000002 */
A Dstm32l162xdx.h4285 #define PWR_CSR_SBF_Pos (1U) macro
4286 #define PWR_CSR_SBF_Msk (0x1UL << PWR_CSR_SBF_Pos) /*!< 0x00000002 */
A Dstm32l162xe.h4285 #define PWR_CSR_SBF_Pos (1U) macro
4286 #define PWR_CSR_SBF_Msk (0x1UL << PWR_CSR_SBF_Pos) /*!< 0x00000002 */
A Dstm32l152xc.h4071 #define PWR_CSR_SBF_Pos (1U) macro
4072 #define PWR_CSR_SBF_Msk (0x1UL << PWR_CSR_SBF_Pos) /*!< 0x00000002 */
A Dstm32l152xca.h4108 #define PWR_CSR_SBF_Pos (1U) macro
4109 #define PWR_CSR_SBF_Msk (0x1UL << PWR_CSR_SBF_Pos) /*!< 0x00000002 */
A Dstm32l152xe.h4155 #define PWR_CSR_SBF_Pos (1U) macro
4156 #define PWR_CSR_SBF_Msk (0x1UL << PWR_CSR_SBF_Pos) /*!< 0x00000002 */
A Dstm32l162xc.h4201 #define PWR_CSR_SBF_Pos (1U) macro
4202 #define PWR_CSR_SBF_Msk (0x1UL << PWR_CSR_SBF_Pos) /*!< 0x00000002 */
A Dstm32l162xca.h4238 #define PWR_CSR_SBF_Pos (1U) macro
4239 #define PWR_CSR_SBF_Msk (0x1UL << PWR_CSR_SBF_Pos) /*!< 0x00000002 */
A Dstm32l151xca.h3975 #define PWR_CSR_SBF_Pos (1U) macro
3976 #define PWR_CSR_SBF_Msk (0x1UL << PWR_CSR_SBF_Pos) /*!< 0x00000002 */
A Dstm32l151xdx.h4022 #define PWR_CSR_SBF_Pos (1U) macro
4023 #define PWR_CSR_SBF_Msk (0x1UL << PWR_CSR_SBF_Pos) /*!< 0x00000002 */
A Dstm32l151xe.h4022 #define PWR_CSR_SBF_Pos (1U) macro
4023 #define PWR_CSR_SBF_Msk (0x1UL << PWR_CSR_SBF_Pos) /*!< 0x00000002 */
A Dstm32l151xc.h3938 #define PWR_CSR_SBF_Pos (1U) macro
3939 #define PWR_CSR_SBF_Msk (0x1UL << PWR_CSR_SBF_Pos) /*!< 0x00000002 */
A Dstm32l152xdx.h4155 #define PWR_CSR_SBF_Pos (1U) macro
4156 #define PWR_CSR_SBF_Msk (0x1UL << PWR_CSR_SBF_Pos) /*!< 0x00000002 */
A Dstm32l151xd.h4282 #define PWR_CSR_SBF_Pos (1U) macro
4283 #define PWR_CSR_SBF_Msk (0x1UL << PWR_CSR_SBF_Pos) /*!< 0x00000002 */
A Dstm32l152xd.h4415 #define PWR_CSR_SBF_Pos (1U) macro
4416 #define PWR_CSR_SBF_Msk (0x1UL << PWR_CSR_SBF_Pos) /*!< 0x00000002 */

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