1 /** @file sys_pcr.h
2 *   @brief PCR Driver Header File
3 *   @date 29.May.2013
4 *   @version 03.05.02
5 *
6 *   This file contains:
7 *   - Definitions
8 *   - Types
9 *   .
10 *   which are relevant for the System driver.
11 */
12 
13 /* (c) Texas Instruments 2009-2013, All rights reserved. */
14 
15 #ifndef __SYS_PCR_H__
16 #define __SYS_PCR_H__
17 
18 #include "reg_pcr.h"
19 
20 /* USER CODE BEGIN (0) */
21 /* USER CODE END */
22 
23 /* PCR General Definitions */
24 
25 typedef uint32 peripheralFrame_CS_t;
26 
27 #define PeripheralFrame_CS0 0U
28 #define PeripheralFrame_CS1 1U
29 #define PeripheralFrame_CS2 2U
30 #define PeripheralFrame_CS3 3U
31 #define PeripheralFrame_CS4 4U
32 #define PeripheralFrame_CS5 5U
33 #define PeripheralFrame_CS6 6U
34 #define PeripheralFrame_CS7 7U
35 #define PeripheralFrame_CS8 8U
36 #define PeripheralFrame_CS9 9U
37 #define PeripheralFrame_CS10 10U
38 #define PeripheralFrame_CS11 11U
39 #define PeripheralFrame_CS12 12U
40 #define PeripheralFrame_CS13 13U
41 #define PeripheralFrame_CS14 14U
42 #define PeripheralFrame_CS15 15U
43 #define PeripheralFrame_CS16 16U
44 #define PeripheralFrame_CS17 17U
45 #define PeripheralFrame_CS18 18U
46 #define PeripheralFrame_CS19 19U
47 #define PeripheralFrame_CS20 20U
48 #define PeripheralFrame_CS21 21U
49 #define PeripheralFrame_CS22 22U
50 #define PeripheralFrame_CS23 23U
51 #define PeripheralFrame_CS24 24U
52 #define PeripheralFrame_CS25 25U
53 #define PeripheralFrame_CS26 26U
54 #define PeripheralFrame_CS27 27U
55 #define PeripheralFrame_CS28 28U
56 #define PeripheralFrame_CS29 29U
57 #define PeripheralFrame_CS30 30U
58 #define PeripheralFrame_CS31 31U
59 
60 /* USER CODE BEGIN (1) */
61 /* USER CODE END */
62 
63 
64 typedef uint32 quadrant_Select_t;
65 #define Quadrant0 1U
66 #define Quadrant1 2U
67 #define Quadrant2 4U
68 #define Quadrant3 8U
69 
70 /* USER CODE BEGIN (2) */
71 /* USER CODE END */
72 
73 /** @typedef peripheral_Frame_Select_t
74 *   @brief PCR Peripheral Frame Type Definition
75 *
76 *   This type is used to access the PCR peripheral Frame configuration register.
77 */
78 typedef struct peripheral_Frame_Select
79 {
80 	peripheralFrame_CS_t Peripheral_CS;
81 	quadrant_Select_t Peripheral_Quadrant;
82 }peripheral_Frame_Select_t;
83 
84 /* USER CODE BEGIN (3) */
85 /* USER CODE END */
86 
87 /** @typedef peripheral_Quad_ChipSelect_t
88 *   @brief PCR Peripheral Frame registers Type Definition
89 *
90 *   This type is used to access all the PCR peripheral Frame configuration registers.
91 */
92 typedef struct peripheral_Quad_ChipSelect
93 {
94 	uint32 Peripheral_Quad0_3_CS0_7;
95 	uint32 Peripheral_Quad4_7_CS8_15;
96 	uint32 Peripheral_Quad8_11_CS16_23;
97 	uint32 Peripheral_Quad12_15_CS24_31;
98 }peripheral_Quad_ChipSelect_t;
99 
100 /* USER CODE BEGIN (4) */
101 /* USER CODE END */
102 
103 /** @typedef peripheral_Memory_ChipSelect_t
104 *   @brief PCR Peripheral Memory Frame registers Type Definition
105 *
106 *   This type is used to access all the PCR peripheral Memory Frame configuration registers.
107 */
108 typedef struct peripheral_Memory_ChipSelect
109 {
110 	uint32 Peripheral_Mem_CS0_31;
111 	uint32 Peripheral_Mem_CS32_63;
112 }peripheral_Memory_ChipSelect_t;
113 
114 /* USER CODE BEGIN (5) */
115 /* USER CODE END */
116 
117 typedef uint32 peripheral_MemoryFrame_CS_t;
118 
119 #define PeripheralMemoryFrame_CS0 0U
120 #define PeripheralMemoryFrame_CS1 1U
121 #define PeripheralMemoryFrame_CS2 2U
122 #define PeripheralMemoryFrame_CS3 3U
123 #define PeripheralMemoryFrame_CS4 4U
124 #define PeripheralMemoryFrame_CS5 5U
125 #define PeripheralMemoryFrame_CS6 6U
126 #define PeripheralMemoryFrame_CS7 7U
127 #define PeripheralMemoryFrame_CS8 8U
128 #define PeripheralMemoryFrame_CS9 9U
129 #define PeripheralMemoryFrame_CS10 10U
130 #define PeripheralMemoryFrame_CS11 11U
131 #define PeripheralMemoryFrame_CS12 12U
132 #define PeripheralMemoryFrame_CS13 13U
133 #define PeripheralMemoryFrame_CS14 14U
134 #define PeripheralMemoryFrame_CS15 15U
135 #define PeripheralMemoryFrame_CS16 16U
136 #define PeripheralMemoryFrame_CS17 17U
137 #define PeripheralMemoryFrame_CS18 18U
138 #define PeripheralMemoryFrame_CS19 19U
139 #define PeripheralMemoryFrame_CS20 20U
140 #define PeripheralMemoryFrame_CS21 21U
141 #define PeripheralMemoryFrame_CS22 22U
142 #define PeripheralMemoryFrame_CS23 23U
143 #define PeripheralMemoryFrame_CS24 24U
144 #define PeripheralMemoryFrame_CS25 25U
145 #define PeripheralMemoryFrame_CS26 26U
146 #define PeripheralMemoryFrame_CS27 27U
147 #define PeripheralMemoryFrame_CS28 28U
148 #define PeripheralMemoryFrame_CS29 29U
149 #define PeripheralMemoryFrame_CS30 30U
150 #define PeripheralMemoryFrame_CS31 31U
151 #define PeripheralMemoryFrame_CS32 32U
152 #define PeripheralMemoryFrame_CS33 33U
153 #define PeripheralMemoryFrame_CS34 34U
154 #define PeripheralMemoryFrame_CS35 35U
155 #define PeripheralMemoryFrame_CS36 36U
156 #define PeripheralMemoryFrame_CS37 37U
157 #define PeripheralMemoryFrame_CS38 38U
158 #define PeripheralMemoryFrame_CS39 39U
159 #define PeripheralMemoryFrame_CS40 40U
160 #define PeripheralMemoryFrame_CS41 41U
161 #define PeripheralMemoryFrame_CS42 42U
162 #define PeripheralMemoryFrame_CS43 43U
163 #define PeripheralMemoryFrame_CS44 44U
164 #define PeripheralMemoryFrame_CS45 45U
165 #define PeripheralMemoryFrame_CS46 46U
166 #define PeripheralMemoryFrame_CS47 47U
167 #define PeripheralMemoryFrame_CS48 48U
168 #define PeripheralMemoryFrame_CS49 49U
169 #define PeripheralMemoryFrame_CS50 50U
170 #define PeripheralMemoryFrame_CS51 51U
171 #define PeripheralMemoryFrame_CS52 52U
172 #define PeripheralMemoryFrame_CS53 53U
173 #define PeripheralMemoryFrame_CS54 54U
174 #define PeripheralMemoryFrame_CS55 55U
175 #define PeripheralMemoryFrame_CS56 56U
176 #define PeripheralMemoryFrame_CS57 57U
177 #define PeripheralMemoryFrame_CS58 58U
178 #define PeripheralMemoryFrame_CS59 59U
179 #define PeripheralMemoryFrame_CS60 60U
180 #define PeripheralMemoryFrame_CS61 61U
181 #define PeripheralMemoryFrame_CS62 62U
182 #define PeripheralMemoryFrame_CS63 63U
183 
184 /* USER CODE BEGIN (6) */
185 /* USER CODE END */
186 
187 /**
188  * @defgroup PCR PCR
189  * @brief Peripheral Central Resource Controller
190  *
191  * The PCR manages the accesses to the peripheral registers and peripheral
192  * memories. It provides a global reset for all the peripherals. It also supports the
193  * capability to selectively enable or disable the clock for each peripheral
194  * individually. The PCR also manages the accesses to the system module
195  * registers required to configure the device�s clocks, interrupts, and so on. The
196  * system module registers also include status flags for indicating exception
197  * conditions � resets, aborts, errors, interrupts.
198  *
199  * Related files:
200  * - reg_pcr.h
201  * - sys_pcr.h
202  * - sys_pcr.c
203  *
204  * @addtogroup PCR
205  * @{
206  */
207 
208 /* PCR Interface Functions */
209 
210 void peripheral_Frame_Protection_Set(peripheral_Frame_Select_t peripheral_Frame);
211 void peripheral_Frame_Protection_Clr(peripheral_Frame_Select_t peripheral_Frame);
212 void peripheral_Frame_Powerdown_Set(peripheral_Frame_Select_t peripheral_Frame);
213 void peripheral_Frame_Powerdown_Clr(peripheral_Frame_Select_t peripheral_Frame);
214 
215 void peripheral_Protection_Set(peripheral_Quad_ChipSelect_t peripheral_Quad_CS);
216 void peripheral_Protection_Clr(peripheral_Quad_ChipSelect_t peripheral_Quad_CS);
217 peripheral_Quad_ChipSelect_t peripheral_Protection_Status(void);
218 void peripheral_Powerdown_Set(peripheral_Quad_ChipSelect_t peripheral_Quad_CS);
219 void peripheral_Powerdown_Clr(peripheral_Quad_ChipSelect_t peripheral_Quad_CS);
220 peripheral_Quad_ChipSelect_t peripheral_Powerdown_Status(void);
221 
222 void peripheral_Memory_Protection_Set(peripheral_Memory_ChipSelect_t peripheral_Memory_CS);
223 void peripheral_Memory_Protection_Clr(peripheral_Memory_ChipSelect_t peripheral_Memory_CS);
224 peripheral_Memory_ChipSelect_t peripheral_Memory_Protection_Status(void);
225 void peripheral_Memory_Powerdown_Set(peripheral_Memory_ChipSelect_t peripheral_Memory_CS);
226 void peripheral_Memory_Powerdown_Clr(peripheral_Memory_ChipSelect_t peripheral_Memory_CS);
227 peripheral_Memory_ChipSelect_t Periipheral_Memory_Powerdown_Status(void);
228 
229 void peripheral_Mem_Frame_Prot_Set(peripheral_MemoryFrame_CS_t peripheral_Memory_Frame_CS);
230 void peripheral_Mem_Frame_Prot_Clr(peripheral_MemoryFrame_CS_t peripheral_Memory_Frame_CS);
231 void peripheral_Mem_Frame_Pwrdwn_Set(peripheral_MemoryFrame_CS_t peripheral_Memory_Frame_CS);
232 void peripheral_Mem_Frame_Pwrdwn_Clr (peripheral_MemoryFrame_CS_t peripheral_Memory_Frame_CS);
233 
234 /**@}*/
235 /* USER CODE BEGIN (7) */
236 /* USER CODE END */
237 
238 #endif
239