1 //########################################################################### 2 // 3 // FILE: F2837xD_cmpss.h 4 // 5 // TITLE: CMPSS Register Definitions. 6 // 7 //########################################################################### 8 // $TI Release: F2837xD Support Library v3.05.00.00 $ 9 // $Release Date: Tue Jun 26 03:15:23 CDT 2018 $ 10 // $Copyright: 11 // Copyright (C) 2013-2018 Texas Instruments Incorporated - http://www.ti.com/ 12 // 13 // Redistribution and use in source and binary forms, with or without 14 // modification, are permitted provided that the following conditions 15 // are met: 16 // 17 // Redistributions of source code must retain the above copyright 18 // notice, this list of conditions and the following disclaimer. 19 // 20 // Redistributions in binary form must reproduce the above copyright 21 // notice, this list of conditions and the following disclaimer in the 22 // documentation and/or other materials provided with the 23 // distribution. 24 // 25 // Neither the name of Texas Instruments Incorporated nor the names of 26 // its contributors may be used to endorse or promote products derived 27 // from this software without specific prior written permission. 28 // 29 // THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 30 // "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 31 // LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR 32 // A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 33 // OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 34 // SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 35 // LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 36 // DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 37 // THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 38 // (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 39 // OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 40 // $ 41 //########################################################################### 42 43 #ifndef __F2837xD_CMPSS_H__ 44 #define __F2837xD_CMPSS_H__ 45 46 #ifdef __cplusplus 47 extern "C" { 48 #endif 49 50 51 //--------------------------------------------------------------------------- 52 // CMPSS Individual Register Bit Definitions: 53 54 struct COMPCTL_BITS { // bits description 55 Uint16 COMPHSOURCE:1; // 0 High Comparator Source Select 56 Uint16 COMPHINV:1; // 1 High Comparator Invert Select 57 Uint16 CTRIPHSEL:2; // 3:2 High Comparator Trip Select 58 Uint16 CTRIPOUTHSEL:2; // 5:4 High Comparator Trip Output Select 59 Uint16 ASYNCHEN:1; // 6 High Comparator Asynchronous Path Enable 60 Uint16 rsvd1:1; // 7 Reserved 61 Uint16 COMPLSOURCE:1; // 8 Low Comparator Source Select 62 Uint16 COMPLINV:1; // 9 Low Comparator Invert Select 63 Uint16 CTRIPLSEL:2; // 11:10 Low Comparator Trip Select 64 Uint16 CTRIPOUTLSEL:2; // 13:12 Low Comparator Trip Output Select 65 Uint16 ASYNCLEN:1; // 14 Low Comparator Asynchronous Path Enable 66 Uint16 COMPDACE:1; // 15 Comparator/DAC Enable 67 }; 68 69 union COMPCTL_REG { 70 Uint16 all; 71 struct COMPCTL_BITS bit; 72 }; 73 74 struct COMPHYSCTL_BITS { // bits description 75 Uint16 COMPHYS:3; // 2:0 Comparator Hysteresis Trim 76 Uint16 rsvd1:13; // 15:3 Reserved 77 }; 78 79 union COMPHYSCTL_REG { 80 Uint16 all; 81 struct COMPHYSCTL_BITS bit; 82 }; 83 84 struct COMPSTS_BITS { // bits description 85 Uint16 COMPHSTS:1; // 0 High Comparator Status 86 Uint16 COMPHLATCH:1; // 1 High Comparator Latched Status 87 Uint16 rsvd1:6; // 7:2 Reserved 88 Uint16 COMPLSTS:1; // 8 Low Comparator Status 89 Uint16 COMPLLATCH:1; // 9 Low Comparator Latched Status 90 Uint16 rsvd2:6; // 15:10 Reserved 91 }; 92 93 union COMPSTS_REG { 94 Uint16 all; 95 struct COMPSTS_BITS bit; 96 }; 97 98 struct COMPSTSCLR_BITS { // bits description 99 Uint16 rsvd1:1; // 0 Reserved 100 Uint16 HLATCHCLR:1; // 1 High Comparator Latched Status Clear 101 Uint16 HSYNCCLREN:1; // 2 High Comparator PWMSYNC Clear Enable 102 Uint16 rsvd2:6; // 8:3 Reserved 103 Uint16 LLATCHCLR:1; // 9 Low Comparator Latched Status Clear 104 Uint16 LSYNCCLREN:1; // 10 Low Comparator PWMSYNC Clear Enable 105 Uint16 rsvd3:5; // 15:11 Reserved 106 }; 107 108 union COMPSTSCLR_REG { 109 Uint16 all; 110 struct COMPSTSCLR_BITS bit; 111 }; 112 113 struct COMPDACCTL_BITS { // bits description 114 Uint16 DACSOURCE:1; // 0 DAC Source Control 115 Uint16 RAMPSOURCE:4; // 4:1 Ramp Generator Source Control 116 Uint16 SELREF:1; // 5 DAC Reference Select 117 Uint16 RAMPLOADSEL:1; // 6 Ramp Load Select 118 Uint16 SWLOADSEL:1; // 7 Software Load Select 119 Uint16 rsvd1:6; // 13:8 Reserved 120 Uint16 FREESOFT:2; // 15:14 Free/Soft Emulation Bits 121 }; 122 123 union COMPDACCTL_REG { 124 Uint16 all; 125 struct COMPDACCTL_BITS bit; 126 }; 127 128 struct DACHVALS_BITS { // bits description 129 Uint16 DACVAL:12; // 11:0 DAC Value Control 130 Uint16 rsvd1:4; // 15:12 Reserved 131 }; 132 133 union DACHVALS_REG { 134 Uint16 all; 135 struct DACHVALS_BITS bit; 136 }; 137 138 struct DACHVALA_BITS { // bits description 139 Uint16 DACVAL:12; // 11:0 DAC Value Control 140 Uint16 rsvd1:4; // 15:12 Reserved 141 }; 142 143 union DACHVALA_REG { 144 Uint16 all; 145 struct DACHVALA_BITS bit; 146 }; 147 148 struct DACLVALS_BITS { // bits description 149 Uint16 DACVAL:12; // 11:0 DAC Value Control 150 Uint16 rsvd1:4; // 15:12 Reserved 151 }; 152 153 union DACLVALS_REG { 154 Uint16 all; 155 struct DACLVALS_BITS bit; 156 }; 157 158 struct DACLVALA_BITS { // bits description 159 Uint16 DACVAL:12; // 11:0 DAC Value Control 160 Uint16 rsvd1:4; // 15:12 Reserved 161 }; 162 163 union DACLVALA_REG { 164 Uint16 all; 165 struct DACLVALA_BITS bit; 166 }; 167 168 struct RAMPDLYA_BITS { // bits description 169 Uint16 DELAY:13; // 12:0 Ramp Delay Value 170 Uint16 rsvd1:3; // 15:13 Reserved 171 }; 172 173 union RAMPDLYA_REG { 174 Uint16 all; 175 struct RAMPDLYA_BITS bit; 176 }; 177 178 struct RAMPDLYS_BITS { // bits description 179 Uint16 DELAY:13; // 12:0 Ramp Delay Value 180 Uint16 rsvd1:3; // 15:13 Reserved 181 }; 182 183 union RAMPDLYS_REG { 184 Uint16 all; 185 struct RAMPDLYS_BITS bit; 186 }; 187 188 struct CTRIPLFILCTL_BITS { // bits description 189 Uint16 rsvd1:4; // 3:0 Reserved 190 Uint16 SAMPWIN:5; // 8:4 Sample Window 191 Uint16 THRESH:5; // 13:9 Majority Voting Threshold 192 Uint16 rsvd2:1; // 14 Reserved 193 Uint16 FILINIT:1; // 15 Filter Initialization Bit 194 }; 195 196 union CTRIPLFILCTL_REG { 197 Uint16 all; 198 struct CTRIPLFILCTL_BITS bit; 199 }; 200 201 struct CTRIPLFILCLKCTL_BITS { // bits description 202 Uint16 CLKPRESCALE:10; // 9:0 Sample Clock Prescale 203 Uint16 rsvd1:6; // 15:10 Reserved 204 }; 205 206 union CTRIPLFILCLKCTL_REG { 207 Uint16 all; 208 struct CTRIPLFILCLKCTL_BITS bit; 209 }; 210 211 struct CTRIPHFILCTL_BITS { // bits description 212 Uint16 rsvd1:4; // 3:0 Reserved 213 Uint16 SAMPWIN:5; // 8:4 Sample Window 214 Uint16 THRESH:5; // 13:9 Majority Voting Threshold 215 Uint16 rsvd2:1; // 14 Reserved 216 Uint16 FILINIT:1; // 15 Filter Initialization Bit 217 }; 218 219 union CTRIPHFILCTL_REG { 220 Uint16 all; 221 struct CTRIPHFILCTL_BITS bit; 222 }; 223 224 struct CTRIPHFILCLKCTL_BITS { // bits description 225 Uint16 CLKPRESCALE:10; // 9:0 Sample Clock Prescale 226 Uint16 rsvd1:6; // 15:10 Reserved 227 }; 228 229 union CTRIPHFILCLKCTL_REG { 230 Uint16 all; 231 struct CTRIPHFILCLKCTL_BITS bit; 232 }; 233 234 struct COMPLOCK_BITS { // bits description 235 Uint16 COMPCTL:1; // 0 COMPCTL Lock 236 Uint16 COMPHYSCTL:1; // 1 COMPHYSCTL Lock 237 Uint16 DACCTL:1; // 2 DACCTL Lock 238 Uint16 CTRIP:1; // 3 CTRIP Lock 239 Uint16 rsvd1:1; // 4 Reserved 240 Uint16 rsvd2:11; // 15:5 Reserved 241 }; 242 243 union COMPLOCK_REG { 244 Uint16 all; 245 struct COMPLOCK_BITS bit; 246 }; 247 248 struct CMPSS_REGS { 249 union COMPCTL_REG COMPCTL; // CMPSS Comparator Control Register 250 union COMPHYSCTL_REG COMPHYSCTL; // CMPSS Comparator Hysteresis Control Register 251 union COMPSTS_REG COMPSTS; // CMPSS Comparator Status Register 252 union COMPSTSCLR_REG COMPSTSCLR; // CMPSS Comparator Status Clear Register 253 union COMPDACCTL_REG COMPDACCTL; // CMPSS DAC Control Register 254 Uint16 rsvd1; // Reserved 255 union DACHVALS_REG DACHVALS; // CMPSS High DAC Value Shadow Register 256 union DACHVALA_REG DACHVALA; // CMPSS High DAC Value Active Register 257 Uint16 RAMPMAXREFA; // CMPSS Ramp Max Reference Active Register 258 Uint16 rsvd2; // Reserved 259 Uint16 RAMPMAXREFS; // CMPSS Ramp Max Reference Shadow Register 260 Uint16 rsvd3; // Reserved 261 Uint16 RAMPDECVALA; // CMPSS Ramp Decrement Value Active Register 262 Uint16 rsvd4; // Reserved 263 Uint16 RAMPDECVALS; // CMPSS Ramp Decrement Value Shadow Register 264 Uint16 rsvd5; // Reserved 265 Uint16 RAMPSTS; // CMPSS Ramp Status Register 266 Uint16 rsvd6; // Reserved 267 union DACLVALS_REG DACLVALS; // CMPSS Low DAC Value Shadow Register 268 union DACLVALA_REG DACLVALA; // CMPSS Low DAC Value Active Register 269 union RAMPDLYA_REG RAMPDLYA; // CMPSS Ramp Delay Active Register 270 union RAMPDLYS_REG RAMPDLYS; // CMPSS Ramp Delay Shadow Register 271 union CTRIPLFILCTL_REG CTRIPLFILCTL; // CTRIPL Filter Control Register 272 union CTRIPLFILCLKCTL_REG CTRIPLFILCLKCTL; // CTRIPL Filter Clock Control Register 273 union CTRIPHFILCTL_REG CTRIPHFILCTL; // CTRIPH Filter Control Register 274 union CTRIPHFILCLKCTL_REG CTRIPHFILCLKCTL; // CTRIPH Filter Clock Control Register 275 union COMPLOCK_REG COMPLOCK; // CMPSS Lock Register 276 Uint16 rsvd7[5]; // Reserved 277 }; 278 279 //--------------------------------------------------------------------------- 280 // CMPSS External References & Function Declarations: 281 // 282 #ifdef CPU1 283 extern volatile struct CMPSS_REGS Cmpss1Regs; 284 extern volatile struct CMPSS_REGS Cmpss2Regs; 285 extern volatile struct CMPSS_REGS Cmpss3Regs; 286 extern volatile struct CMPSS_REGS Cmpss4Regs; 287 extern volatile struct CMPSS_REGS Cmpss5Regs; 288 extern volatile struct CMPSS_REGS Cmpss6Regs; 289 extern volatile struct CMPSS_REGS Cmpss7Regs; 290 extern volatile struct CMPSS_REGS Cmpss8Regs; 291 #endif 292 #ifdef CPU2 293 extern volatile struct CMPSS_REGS Cmpss1Regs; 294 extern volatile struct CMPSS_REGS Cmpss2Regs; 295 extern volatile struct CMPSS_REGS Cmpss3Regs; 296 extern volatile struct CMPSS_REGS Cmpss4Regs; 297 extern volatile struct CMPSS_REGS Cmpss5Regs; 298 extern volatile struct CMPSS_REGS Cmpss6Regs; 299 extern volatile struct CMPSS_REGS Cmpss7Regs; 300 extern volatile struct CMPSS_REGS Cmpss8Regs; 301 #endif 302 #ifdef __cplusplus 303 } 304 #endif /* extern "C" */ 305 306 #endif 307 308 //=========================================================================== 309 // End of file. 310 //=========================================================================== 311