Home
last modified time | relevance | path

Searched refs:RB_FCR_FIFO_EN (Results 1 – 8 of 8) sorted by relevance

/bsp/wch/arm/ch579m/board/
A Ddrv_uart.c112 …R8_UART0_FCR = (2 << 6) | RB_FCR_TX_FIFO_CLR | RB_FCR_RX_FIFO_CLR | RB_FCR_FIFO_EN; // FIFO打开,… in uart_configure()
125 …R8_UART1_FCR = (2 << 6) | RB_FCR_TX_FIFO_CLR | RB_FCR_RX_FIFO_CLR | RB_FCR_FIFO_EN; // FIFO打开,… in uart_configure()
138 …R8_UART2_FCR = (2 << 6) | RB_FCR_TX_FIFO_CLR | RB_FCR_RX_FIFO_CLR | RB_FCR_FIFO_EN; // FIFO打开,… in uart_configure()
151 …R8_UART3_FCR = (2 << 6) | RB_FCR_TX_FIFO_CLR | RB_FCR_RX_FIFO_CLR | RB_FCR_FIFO_EN; // FIFO打开,… in uart_configure()
/bsp/wch/arm/ch579m/libraries/StdPeriphDriver/
A DCH57x_uart0.c20 …R8_UART0_FCR = (2<<6) | RB_FCR_TX_FIFO_CLR | RB_FCR_RX_FIFO_CLR | RB_FCR_FIFO_EN; // FIFO打开,… in UART0_DefInit()
A DCH57x_uart1.c20 …R8_UART1_FCR = (2<<6) | RB_FCR_TX_FIFO_CLR | RB_FCR_RX_FIFO_CLR | RB_FCR_FIFO_EN; // FIFO打开,… in UART1_DefInit()
A DCH57x_uart2.c20 …R8_UART2_FCR = (2<<6) | RB_FCR_TX_FIFO_CLR | RB_FCR_RX_FIFO_CLR | RB_FCR_FIFO_EN; // FIFO打开,… in UART2_DefInit()
A DCH57x_uart3.c20 …R8_UART3_FCR = (2<<6) | RB_FCR_TX_FIFO_CLR | RB_FCR_RX_FIFO_CLR | RB_FCR_FIFO_EN; // FIFO打开,… in UART3_DefInit()
/bsp/wch/risc-v/Libraries/ch56x_drivers/
A Dch56x_uart.h101 #define RB_FCR_FIFO_EN 0x01 macro
A Dch56x_uart.c151 fcr.reg = RB_FCR_FIFO_EN | RB_FCR_RX_FIFO_CLR | RB_FCR_TX_FIFO_CLR; in uart_configure()
/bsp/wch/arm/ch579m/libraries/StdPeriphDriver/inc/
A DCH579SFR.h915 #define RB_FCR_FIFO_EN 0x01 // RW, UART FIFO enable macro

Completed in 24 milliseconds