Searched refs:RB_SPI_MST_DLY_EN (Results 1 – 3 of 3) sorted by relevance
36 R8_SPI1_CTRL_CFG |= RB_SPI_MST_DLY_EN; in SPI1_CLKCfg()38 R8_SPI1_CTRL_CFG &= ~RB_SPI_MST_DLY_EN; in SPI1_CLKCfg()
36 R8_SPI0_CTRL_CFG |= RB_SPI_MST_DLY_EN; in SPI0_CLKCfg()38 R8_SPI0_CTRL_CFG &= ~RB_SPI_MST_DLY_EN; in SPI0_CLKCfg()
1029 #define RB_SPI_MST_DLY_EN 0x40 // RW, SPI master input delay enable macro
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