| /bsp/mm32l3xx/Libraries/MM32L3xx/Source/ |
| A D | system_MM32L3xx.c | 204 RCC->CIR = 0x009F0000; in SystemInit()
854 RCC->CR|=RCC_CR_HSION; in SetSysClockTo48_HSI()
862 RCC->CR &=~(0x1f<<26); in SetSysClockTo48_HSI()
869 RCC->CFGR&=~RCC_CFGR_SW; in SetSysClockTo48_HSI()
873 temp=RCC->CFGR>>2; in SetSysClockTo48_HSI()
881 RCC->CR|=RCC_CR_HSION; in SetSysClockTo72_HSI()
889 RCC->CR &=~(0x1f<<26); in SetSysClockTo72_HSI()
896 RCC->CFGR&=~RCC_CFGR_SW; in SetSysClockTo72_HSI()
900 temp=RCC->CFGR>>2; in SetSysClockTo72_HSI()
916 RCC->CR &=~(0x1f<<26); in SetSysClockTo96_HSI()
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| /bsp/mm32f103x/Libraries/MM32F103/Source/ |
| A D | system_MM32F103.c | 204 RCC->CIR = 0x009F0000; in SystemInit()
875 RCC->CR |= RCC_CR_HSION; in SetSysClockTo48_HSI()
883 RCC->CR &= ~(0x1f << 26); in SetSysClockTo48_HSI()
890 RCC->CFGR &= ~RCC_CFGR_SW; in SetSysClockTo48_HSI()
894 temp = RCC->CFGR >> 2; in SetSysClockTo48_HSI()
902 RCC->CR |= RCC_CR_HSION; in SetSysClockTo72_HSI()
910 RCC->CR &= ~(0x1f << 26); in SetSysClockTo72_HSI()
917 RCC->CFGR &= ~RCC_CFGR_SW; in SetSysClockTo72_HSI()
921 temp = RCC->CFGR >> 2; in SetSysClockTo72_HSI()
929 RCC->CR |= RCC_CR_HSION; in SetSysClockTo96_HSI()
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| /bsp/mm32l07x/Libraries/MM32L0xx/Source/ |
| A D | system_MM32L0xx.c | 177 RCC->CR |= (uint32_t)0x1; in SystemInit()
194 RCC->CIR &= 0xFF62E262; in SystemInit()
567 RCC->CR|=RCC_CR_HSION; in SetSysClockTo24_HSI()
575 RCC->CR &=~(0x1f<<26); in SetSysClockTo24_HSI()
582 RCC->CFGR&=~RCC_CFGR_SW; in SetSysClockTo24_HSI()
586 temp=RCC->CFGR>>2; in SetSysClockTo24_HSI()
596 RCC->CR|=RCC_CR_HSION; in SetSysClockTo36_HSI()
604 RCC->CR &=~(0x1f<<26); in SetSysClockTo36_HSI()
615 temp=RCC->CFGR>>2; in SetSysClockTo36_HSI()
633 RCC->CR &=~(0x1f<<26); in SetSysClockTo48_HSI()
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| /bsp/stm32/libraries/STM32L1xx_HAL/STM32L1xx_HAL_Driver/Inc/ |
| A D | stm32l1xx_hal_rcc.h | 706 #define __HAL_RCC_CRC_CLK_DISABLE() (RCC->AHBENR &= ~(RCC_AHBENR_CRCEN))
921 #define __HAL_RCC_AHB_FORCE_RESET() (RCC->AHBRSTR = 0xFFFFFFFFU)
932 #define __HAL_RCC_AHB_RELEASE_RESET() (RCC->AHBRSTR = 0x00000000U)
951 #define __HAL_RCC_APB1_FORCE_RESET() (RCC->APB1RSTR = 0xFFFFFFFFU)
968 #define __HAL_RCC_APB1_RELEASE_RESET() (RCC->APB1RSTR = 0x00000000U)
993 #define __HAL_RCC_APB2_FORCE_RESET() (RCC->APB2RSTR = 0xFFFFFFFFU)
1002 #define __HAL_RCC_APB2_RELEASE_RESET() (RCC->APB2RSTR = 0x00000000U)
1605 MODIFY_REG(RCC->CFGR, RCC_CFGR_SW, (__SYSCLKSOURCE__))
1700 #define __HAL_RCC_GET_RTC_SOURCE() (READ_BIT(RCC->CSR, RCC_CSR_RTCSEL))
1803 #define __HAL_RCC_CLEAR_RESET_FLAGS() (RCC->CSR |= RCC_CSR_RMVF)
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| /bsp/mm32f327x/Libraries/MM32F327x/HAL_Lib/Src/ |
| A D | hal_rcc.c | 53 CLEAR_REG(RCC->CFGR); in RCC_DeInit()
54 CLEAR_REG(RCC->CIR); in RCC_DeInit()
101 …return ((((flag >> 5) == CR_REG_INDEX) ? RCC->CR : (((flag >> 5) == BDCR_REG_INDEX) ? RCC->BDCR : … in RCC_GetFlagStatus()
495 (state) ? (RCC->AHBENR |= ahb_periph) : (RCC->AHBENR &= ~ahb_periph); in RCC_AHBPeriphClockCmd()
503 (state) ? (RCC->AHB2ENR |= ahb_periph) : (RCC->AHB2ENR &= ~ahb_periph); in RCC_AHB2PeriphClockCmd()
511 (state) ? (RCC->AHB3ENR |= ahb_periph) : (RCC->AHB3ENR &= ~ahb_periph); in RCC_AHB3PeriphClockCmd()
524 (state) ? (RCC->APB2ENR |= apb2_periph) : (RCC->APB2ENR &= ~apb2_periph); in RCC_APB2PeriphClockCmd()
537 (state) ? (RCC->APB1ENR |= apb1_periph) : (RCC->APB1ENR &= ~apb1_periph); in RCC_APB1PeriphClockCmd()
574 (state) ? (RCC->AHBRSTR |= ahb_periph) : (RCC->AHBRSTR &= ~ahb_periph); in RCC_AHBPeriphResetCmd()
586 (state) ? (RCC->AHB2RSTR |= ahb_periph) : (RCC->AHB2RSTR &= ~ahb_periph); in RCC_AHB2PeriphResetCmd()
[all …]
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| /bsp/mm32f327x/Libraries/MM32F327x/Source/ |
| A D | system_mm32f327x.c | 187 RCC->CIR = 0x009F0000; in SystemInit()
569 RCC->CR |= RCC_CR_HSION; in SetSysClockToXX()
638 RCC->CR |= RCC_CR_PLLON; in SetSysClockToXX()
668 RCC->CR |= RCC_CR_HSION; in SetSysClockTo24_HSI()
683 RCC->CR |= RCC_CR_PLLON; in SetSysClockTo24_HSI()
702 RCC->CR |= RCC_CR_HSION; in SetSysClockTo36_HSI()
715 RCC->CR |= RCC_CR_PLLON; in SetSysClockTo36_HSI()
734 RCC->CR |= RCC_CR_HSION; in SetSysClockTo48_HSI()
752 RCC->CR |= RCC_CR_PLLON; in SetSysClockTo48_HSI()
773 RCC->CR |= RCC_CR_HSION; in SetSysClockToXX_HSI()
[all …]
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| /bsp/airm2m/air32f103/libraries/AIR32F10xLib/src/ |
| A D | system_air32f10x.c | 239 RCC->CIR = 0x00FF0000; in SystemInit()
242 RCC->CFGR2 = 0x00000000; in SystemInit()
245 RCC->CIR = 0x009F0000; in SystemInit()
248 RCC->CFGR2 = 0x00000000; in SystemInit()
251 RCC->CIR = 0x009F0000; in SystemInit()
461 RCC->AHBENR = 0x00000114; in SystemInit_ExtMemCtl()
464 RCC->APB2ENR = 0x000001E0; in SystemInit_ExtMemCtl()
654 RCC->CR |= RCC_CR_PLLON; in SetSysClockTo24()
755 RCC->CR |= RCC_CR_PLLON; in SetSysClockTo36()
855 RCC->CR |= RCC_CR_PLLON; in SetSysClockTo48()
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| /bsp/wch/arm/Libraries/CH32F20x_StdPeriph_Driver/CMSIS/WCH/CH32F20x/Source/ |
| A D | system_ch32f20x.c | 90 RCC->CTLR |= (uint32_t)0x00000001; in SystemInit()
92 RCC->CTLR &= (uint32_t)0xFEF6FFFF; in SystemInit()
95 RCC->INTR = 0x009F0000; in SystemInit()
116 tmp = RCC->CFGR0 & RCC_SWS; in SystemCoreClockUpdate()
324 RCC->CTLR |= RCC_PLLON; in SetSysClockTo24()
403 RCC->CTLR |= RCC_PLLON; in SetSysClockTo48()
482 RCC->CTLR |= RCC_PLLON; in SetSysClockTo56()
563 RCC->CTLR |= RCC_PLLON; in SetSysClockTo72()
644 RCC->CTLR |= RCC_PLLON; in SetSysClockTo96()
725 RCC->CTLR |= RCC_PLLON; in SetSysClockTo120()
[all …]
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| /bsp/wch/arm/ch32f203r-evt/board/ |
| A D | system_ch32f20x.c | 84 RCC->CTLR |= (uint32_t)0x00000001; in SystemInit()
86 RCC->CTLR &= (uint32_t)0xFEF6FFFF; in SystemInit()
89 RCC->INTR = 0x009F0000; in SystemInit()
104 tmp = RCC->CFGR0 & RCC_SWS; in SystemCoreClockUpdate()
312 RCC->CTLR |= RCC_PLLON; in SetSysClockTo24()
391 RCC->CTLR |= RCC_PLLON; in SetSysClockTo48()
470 RCC->CTLR |= RCC_PLLON; in SetSysClockTo56()
551 RCC->CTLR |= RCC_PLLON; in SetSysClockTo72()
632 RCC->CTLR |= RCC_PLLON; in SetSysClockTo96()
713 RCC->CTLR |= RCC_PLLON; in SetSysClockTo120()
[all …]
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| /bsp/stm32/stm32h743-armfly-v7/board/CubeMX_Config/ |
| A D | CubeMX_Config.ioc | 8 Mcu.IP2=RCC
90 RCC.CECFreq_Value=32000
101 RCC.DIVM1=5
102 RCC.DIVM2=5
103 RCC.DIVM3=5
104 RCC.DIVN1=160
105 RCC.DIVN2=160
106 RCC.DIVN3=160
118 RCC.FamilyName=M
121 RCC.HPRE=RCC_HCLK_DIV2
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| /bsp/stm32/stm32h743-st-nucleo/board/CubeMX_Config/ |
| A D | CubeMX_Config.ioc | 7 Mcu.IP2=RCC
88 RCC.CECFreq_Value=32000
93 RCC.D1PPRE=RCC_APB3_DIV2
99 RCC.DIVM1=1
100 RCC.DIVN1=120
112 RCC.FamilyName=M
115 RCC.HPRE=RCC_HCLK_DIV2
117 RCC.HSE_VALUE=8000000
128 RCC.PLL2FRACN=0
129 RCC.PLL3FRACN=0
[all …]
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| /bsp/ft32/libraries/FT32F0xx/CMSIS/FT32F0xx/source/ |
| A D | system_ft32f0xx.c | 130 RCC->CR |= (uint32_t)0x00000001; in SystemInit()
136 RCC->CR &= (uint32_t)0xFEF6FFFF; in SystemInit()
139 RCC->CR &= (uint32_t)0xFFFBFFFF; in SystemInit()
154 RCC->CIR = 0x00000000; in SystemInit()
200 tmp = RCC->CFGR & RCC_CFGR_SWS; in SystemCoreClockUpdate()
375 RCC->CR |= RCC_CR_PLLON; in SetSysClockTo24()
444 RCC->CR |= RCC_CR_PLLON; in SetSysClockTo36()
513 RCC->CR |= RCC_CR_PLLON; in SetSysClockTo48()
582 RCC->CR |= RCC_CR_PLLON; in SetSysClockTo56()
651 RCC->CR |= RCC_CR_PLLON; in SetSysClockTo72()
[all …]
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| /bsp/stm32/libraries/templates/stm32h7xx/board/CubeMX_Config/ |
| A D | CubeMX_Config.ioc | 7 Mcu.IP2=RCC
97 RCC.CECFreq_Value=32000
104 RCC.D1PPRE=RCC_APB3_DIV2
105 RCC.D2PPRE1=RCC_APB1_DIV2
106 RCC.D2PPRE2=RCC_APB2_DIV2
107 RCC.D3PPRE=RCC_APB4_DIV2
110 RCC.DIVM1=5
111 RCC.DIVN1=160
123 RCC.FamilyName=M
126 RCC.HPRE=RCC_HCLK_DIV2
[all …]
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| /bsp/wch/risc-v/Libraries/CH32V10x_StdPeriph_Driver/CMSIS/WCH/CH32V10x/Source/ |
| A D | system_ch32v10x.c | 65 RCC->CTLR |= (uint32_t)0x00000001; in SystemInit()
66 RCC->CFGR0 &= (uint32_t)0xF8FF0000; in SystemInit()
67 RCC->CTLR &= (uint32_t)0xFEF6FFFF; in SystemInit()
68 RCC->CTLR &= (uint32_t)0xFFFBFFFF; in SystemInit()
69 RCC->CFGR0 &= (uint32_t)0xFF80FFFF; in SystemInit()
70 RCC->INTR = 0x009F0000; in SystemInit()
85 tmp = RCC->CFGR0 & RCC_SWS; in SystemCoreClockUpdate()
261 RCC->CTLR |= RCC_PLLON; in SetSysClockTo24()
334 RCC->CTLR |= RCC_PLLON; in SetSysClockTo48()
407 RCC->CTLR |= RCC_PLLON; in SetSysClockTo56()
[all …]
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| /bsp/wch/arm/Libraries/CH32F20x_StdPeriph_Driver/StdPeriph_Driver/src/ |
| A D | ch32f20x_rcc.c | 165 tmpreg = RCC->CTLR; in RCC_AdjustHSICalibrationValue()
168 RCC->CTLR = tmpreg; in RCC_AdjustHSICalibrationValue()
240 tmpreg = RCC->CFGR0; in RCC_PLLConfig()
243 RCC->CFGR0 = tmpreg; in RCC_PLLConfig()
276 tmpreg = RCC->CFGR0; in RCC_SYSCLKConfig()
279 RCC->CFGR0 = tmpreg; in RCC_SYSCLKConfig()
315 tmpreg = RCC->CFGR0; in RCC_HCLKConfig()
318 RCC->CFGR0 = tmpreg; in RCC_HCLKConfig()
337 tmpreg = RCC->CFGR0; in RCC_PCLK1Config()
340 RCC->CFGR0 = tmpreg; in RCC_PCLK1Config()
[all …]
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| /bsp/wch/arm/ch32f103c8-core/board/ |
| A D | system_ch32f10x.c | 76 RCC->CTLR |= (uint32_t)0x00000001; in SystemInit()
78 RCC->CTLR &= (uint32_t)0xFEF6FFFF; in SystemInit()
79 RCC->CTLR &= (uint32_t)0xFFFBFFFF; in SystemInit()
81 RCC->INTR = 0x009F0000; in SystemInit()
102 tmp = RCC->CFGR0 & RCC_SWS; in SystemCoreClockUpdate()
178 RCC->AHBENR = 0x00000114; in SystemInit_ExtMemCtl()
179 RCC->APB2ENR = 0x000001E0; in SystemInit_ExtMemCtl()
309 RCC->CTLR |= RCC_PLLON; in SetSysClockTo24()
383 RCC->CTLR |= RCC_PLLON; in SetSysClockTo48()
455 RCC->CTLR |= RCC_PLLON; in SetSysClockTo56()
[all …]
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| /bsp/wch/arm/Libraries/CH32F10x_StdPeriph_Driver/CMSIS/WCH/CH32F10x/Source/ |
| A D | system_ch32f10x.c | 76 RCC->CTLR |= (uint32_t)0x00000001; in SystemInit()
78 RCC->CTLR &= (uint32_t)0xFEF6FFFF; in SystemInit()
79 RCC->CTLR &= (uint32_t)0xFFFBFFFF; in SystemInit()
81 RCC->INTR = 0x009F0000; in SystemInit()
102 tmp = RCC->CFGR0 & RCC_SWS; in SystemCoreClockUpdate()
178 RCC->AHBENR = 0x00000114; in SystemInit_ExtMemCtl()
179 RCC->APB2ENR = 0x000001E0; in SystemInit_ExtMemCtl()
309 RCC->CTLR |= RCC_PLLON; in SetSysClockTo24()
383 RCC->CTLR |= RCC_PLLON; in SetSysClockTo48()
455 RCC->CTLR |= RCC_PLLON; in SetSysClockTo56()
[all …]
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| /bsp/stm32/stm32l4r5-st-nucleo/board/CubeMX_Config/ |
| A D | STM32L4R5ZITx.ioc | 7 Mcu.IP2=RCC
109 RCC.FamilyName=M
111 RCC.HSE_VALUE=8000000
113 RCC.HSI_VALUE=16000000
127 RCC.LSI_VALUE=32000
129 RCC.MSI_VALUE=4000000
131 RCC.PLLM1=2
132 RCC.PLLM2=2
133 RCC.PLLM3=2
134 RCC.PLLN=25
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| /bsp/stm32/libraries/templates/stm32f7xx/board/CubeMX_Config/ |
| A D | CubeMX_Config.ioc | 7 Mcu.IP2=RCC
85 RCC.AHBFreq_Value=216000000
87 RCC.APB1Freq_Value=54000000
98 RCC.FamilyName=M
100 RCC.HSE_VALUE=25000000
101 RCC.HSI_VALUE=16000000
106 RCC.I2SFreq_Value=96000000
110 RCC.LSE_VALUE=32768
111 RCC.LSI_VALUE=32000
118 RCC.PLLM=25
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| /bsp/stm32/stm32u585-iot02a/board/CubeMX_Config/ |
| A D | CubeMX_Config.ioc | 17 Mcu.IP5=RCC
98 RCC.DACFreq_Value=32000
99 RCC.EPOD_VALUE=4000000
102 RCC.FamilyName=M
104 RCC.HSE_VALUE=16000000
106 RCC.HSI_VALUE=16000000
115 RCC.LSE_VALUE=32768
116 RCC.LSIDIV_VALUE=32000
117 RCC.LSI_VALUE=32000
120 RCC.MSI_VALUE=4000000
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| /bsp/ft32/libraries/FT32F0xx/FT32F0xx_Driver/Src/ |
| A D | ft32f0xx_rcc.c | 80 RCC->CIR = 0x00000000; in RCC_DeInit()
170 tmpreg = RCC->CR; in RCC_AdjustHSICalibrationValue()
179 RCC->CR = tmpreg; in RCC_AdjustHSICalibrationValue()
230 tmpreg = RCC->CR2; in RCC_AdjustHSI14CalibrationValue()
239 RCC->CR2 = tmpreg; in RCC_AdjustHSI14CalibrationValue()
539 tmpreg = RCC->CFGR; in RCC_MCOConfig()
545 RCC->CFGR = tmpreg; in RCC_MCOConfig()
578 tmpreg = RCC->CFGR; in RCC_SYSCLKConfig()
587 RCC->CFGR = tmpreg; in RCC_SYSCLKConfig()
628 tmpreg = RCC->CFGR; in RCC_HCLKConfig()
[all …]
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| /bsp/stm32/stm32h7s7-st-disco/board/CubeMX_Config/ |
| A D | CubeMX_Config.ioc | 19 Mcu.IP4=RCC
113 RCC.BMPRE=RCC_HCLK_DIV2
114 RCC.CECFreq_Value=32768
119 RCC.DIVM1=5
120 RCC.DIVM2=8
121 RCC.DIVN1=112
122 RCC.DIVP1=1
138 RCC.DTSFreq_Value=32768
143 RCC.FamilyName=M
145 RCC.HSE_VALUE=25000000
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| /bsp/stm32/stm32h723-st-nucleo/board/CubeMX_Config/ |
| A D | CubeMX_Config.ioc | 15 Mcu.IP3=RCC
86 RCC.ADCFreq_Value=129000000
88 RCC.AHB4Freq_Value=64000000
89 RCC.APB1Freq_Value=32000000
90 RCC.APB2Freq_Value=64000000
91 RCC.APB3Freq_Value=64000000
94 RCC.CECFreq_Value=32000
99 RCC.D2PPRE1=RCC_APB1_DIV2
112 RCC.FMCFreq_Value=64000000
113 RCC.FamilyName=M
[all …]
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| /bsp/hk32/libraries/HK32F0xx_StdPeriph_Driver/src/ |
| A D | hk32f0xx_rcc.c | 242 tmpreg = RCC->CR; in RCC_AdjustHSICalibrationValue()
251 RCC->CR = tmpreg; in RCC_AdjustHSICalibrationValue()
302 tmpreg = RCC->CR2; in RCC_AdjustHSI14CalibrationValue()
311 RCC->CR2 = tmpreg; in RCC_AdjustHSI14CalibrationValue()
625 tmpreg = RCC->CFGR; in RCC_MCOConfig()
631 RCC->CFGR = tmpreg; in RCC_MCOConfig()
738 tmpreg = RCC->CFGR; in RCC_SYSCLKConfig()
747 RCC->CFGR = tmpreg; in RCC_SYSCLKConfig()
787 tmpreg = RCC->CFGR; in RCC_HCLKConfig()
796 RCC->CFGR = tmpreg; in RCC_HCLKConfig()
[all …]
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| /bsp/wch/risc-v/Libraries/CH32V10x_StdPeriph_Driver/StdPeriph_Driver/src/ |
| A D | ch32v10x_rcc.c | 159 tmpreg = RCC->CTLR; in RCC_AdjustHSICalibrationValue()
162 RCC->CTLR = tmpreg; in RCC_AdjustHSICalibrationValue()
207 tmpreg = RCC->CFGR0; in RCC_PLLConfig()
210 RCC->CFGR0 = tmpreg; in RCC_PLLConfig()
250 tmpreg = RCC->CFGR0; in RCC_SYSCLKConfig()
253 RCC->CFGR0 = tmpreg; in RCC_SYSCLKConfig()
293 tmpreg = RCC->CFGR0; in RCC_HCLKConfig()
296 RCC->CFGR0 = tmpreg; in RCC_HCLKConfig()
318 tmpreg = RCC->CFGR0; in RCC_PCLK1Config()
321 RCC->CFGR0 = tmpreg; in RCC_PCLK1Config()
[all …]
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