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Searched refs:RCC_APB2ENR_ADC1 (Results 1 – 6 of 6) sorted by relevance

/bsp/mm32f327x/drivers/
A Ddrv_adc.c59 RCC_APB2PeriphClockCmd(RCC_APB2ENR_ADC1, ENABLE); //Enable ADC1 clock in mm32_adc_init()
/bsp/mm32f327x/Libraries/MM32F327x/HAL_Lib/Src/
A Dhal_rcc.c823 (state) ? (RCC->APB2ENR |= RCC_APB2ENR_ADC1) : (RCC->APB2ENR &= ~RCC_APB2ENR_ADC1); in RCC_ADC_ClockCmd()
A Dhal_adc.c49 exRCC_APB2PeriphReset(RCC_APB2ENR_ADC1); in ADC_DeInit()
/bsp/mm32f327x/Libraries/MM32F327x/Include/
A Dreg_rcc.h413 #define RCC_APB2ENR_ADC1 (0x01U << RCC_APB2ENR_ADC1_Pos) ///< ADC1 enable macro
A Dmm32_reg_redefine_v1.h736 #define RCC_APB2Periph_ADC1 RCC_APB2ENR_ADC1
743 #define RCC_APB2ENR_ADC1EN RCC_APB2ENR_ADC1
/bsp/mm32/libraries/MM32F3270_HAL/CMSIS/Device/MM32/MM32F3277/Include/
A Dmm32f3277g.h1224 #define RCC_APB2ENR_ADC1(x) (((uint32_t)(((uint32_t)(x)) << RCC_APB2ENR_ADC1_SH… macro

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