Home
last modified time | relevance | path

Searched refs:RCC_CFGR_SW (Results 1 – 25 of 52) sorted by relevance

123

/bsp/mm32l07x/Libraries/MM32L0xx/Source/
A Dsystem_MM32L0xx.c289 RCC->CFGR &= (uint32_t)((uint32_t)~(RCC_CFGR_SW)); in SetSysClockToHSE()
375 RCC->CFGR &= (uint32_t)((uint32_t)~(RCC_CFGR_SW)); in SetSysClockTo24()
462 RCC->CFGR &= (uint32_t)((uint32_t)~(RCC_CFGR_SW)); in SetSysClockTo36()
548 RCC->CFGR &= (uint32_t)((uint32_t)~(RCC_CFGR_SW)); in SetSysClockTo48()
582 RCC->CFGR&=~RCC_CFGR_SW; in SetSysClockTo24_HSI()
611 RCC->CFGR&=~RCC_CFGR_SW; in SetSysClockTo36_HSI()
640 RCC->CFGR&=~RCC_CFGR_SW; in SetSysClockTo48_HSI()
/bsp/mm32l3xx/Libraries/MM32L3xx/Source/
A Dsystem_MM32L3xx.c308 RCC->CFGR &= (uint32_t)((uint32_t)~(RCC_CFGR_SW)); in SetSysClockToHSE()
396 RCC->CFGR &= (uint32_t)((uint32_t)~(RCC_CFGR_SW)); in SetSysClockTo24()
484 RCC->CFGR &= (uint32_t)((uint32_t)~(RCC_CFGR_SW)); in SetSysClockTo36()
570 RCC->CFGR &= (uint32_t)((uint32_t)~(RCC_CFGR_SW)); in SetSysClockTo48()
658 RCC->CFGR &= (uint32_t)((uint32_t)~(RCC_CFGR_SW)); in SetSysClockTo56()
746 RCC->CFGR &= (uint32_t)((uint32_t)~(RCC_CFGR_SW)); in SetSysClockTo72()
833 RCC->CFGR &= (uint32_t)((uint32_t)~(RCC_CFGR_SW)); in SetSysClockTo96()
869 RCC->CFGR&=~RCC_CFGR_SW; in SetSysClockTo48_HSI()
896 RCC->CFGR&=~RCC_CFGR_SW; in SetSysClockTo72_HSI()
923 RCC->CFGR&=~RCC_CFGR_SW; in SetSysClockTo96_HSI()
/bsp/mm32f103x/Libraries/MM32F103/Source/
A Dsystem_MM32F103.c310 RCC->CFGR &= (uint32_t)((uint32_t)~(RCC_CFGR_SW)); in SetSysClockToHSE()
401 RCC->CFGR &= (uint32_t)((uint32_t)~(RCC_CFGR_SW)); in SetSysClockTo24()
492 RCC->CFGR &= (uint32_t)((uint32_t)~(RCC_CFGR_SW)); in SetSysClockTo36()
581 RCC->CFGR &= (uint32_t)((uint32_t)~(RCC_CFGR_SW)); in SetSysClockTo48()
672 RCC->CFGR &= (uint32_t)((uint32_t)~(RCC_CFGR_SW)); in SetSysClockTo56()
763 RCC->CFGR &= (uint32_t)((uint32_t)~(RCC_CFGR_SW)); in SetSysClockTo72()
853 RCC->CFGR &= (uint32_t)((uint32_t)~(RCC_CFGR_SW)); in SetSysClockTo96()
890 RCC->CFGR &= ~RCC_CFGR_SW; in SetSysClockTo48_HSI()
917 RCC->CFGR &= ~RCC_CFGR_SW; in SetSysClockTo72_HSI()
944 RCC->CFGR &= ~RCC_CFGR_SW; in SetSysClockTo96_HSI()
/bsp/ft32/libraries/FT32F0xx/CMSIS/FT32F0xx/source/
A Dsystem_ft32f0xx.c314 RCC->CFGR &= (uint32_t)((uint32_t)~(RCC_CFGR_SW)); in SetSysClockToHSE()
383 RCC->CFGR &= (uint32_t)((uint32_t)~(RCC_CFGR_SW)); in SetSysClockTo24()
452 RCC->CFGR &= (uint32_t)((uint32_t)~(RCC_CFGR_SW)); in SetSysClockTo36()
521 RCC->CFGR &= (uint32_t)((uint32_t)~(RCC_CFGR_SW)); in SetSysClockTo48()
590 RCC->CFGR &= (uint32_t)((uint32_t)~(RCC_CFGR_SW)); in SetSysClockTo56()
659 RCC->CFGR &= (uint32_t)((uint32_t)~(RCC_CFGR_SW)); in SetSysClockTo72()
728 RCC->CFGR &= (uint32_t)((uint32_t)~(RCC_CFGR_SW)); in SetSysClockTo96()
/bsp/mm32f327x/Libraries/MM32F327x/Source/
A Dsystem_mm32f327x.c322 RCC->CFGR &= (u32)((u32)~(RCC_CFGR_SW)); in SetSysClockToHSE()
396 RCC->CFGR &= (u32)((u32)~(RCC_CFGR_SW)); in SetSysClockTo24()
469 RCC->CFGR &= (u32)((u32)~(RCC_CFGR_SW)); in SetSysClockTo36()
542 RCC->CFGR &= (u32)((u32)~(RCC_CFGR_SW)); in SetSysClockTo48()
644 RCC->CFGR &= (u32)((u32)~(RCC_CFGR_SW)); in SetSysClockToXX()
687 RCC->CFGR &= ~RCC_CFGR_SW; in SetSysClockTo24_HSI()
719 RCC->CFGR &= ~ RCC_CFGR_SW; in SetSysClockTo36_HSI()
756 RCC->CFGR &= ~RCC_CFGR_SW; in SetSysClockTo48_HSI()
831 RCC->CFGR &= (u32)((u32)~(RCC_CFGR_SW)); in SetSysClockToXX_HSI()
/bsp/airm2m/air32f103/libraries/AIR32F10xLib/src/
A Dsystem_air32f10x.c558 RCC->CFGR &= (uint32_t)((uint32_t)~(RCC_CFGR_SW)); in SetSysClockToHSE()
662 RCC->CFGR &= (uint32_t)((uint32_t)~(RCC_CFGR_SW)); in SetSysClockTo24()
763 RCC->CFGR &= (uint32_t)((uint32_t)~(RCC_CFGR_SW)); in SetSysClockTo36()
863 RCC->CFGR &= (uint32_t)((uint32_t)~(RCC_CFGR_SW)); in SetSysClockTo48()
965 RCC->CFGR &= (uint32_t)((uint32_t)~(RCC_CFGR_SW)); in SetSysClockTo56()
1068 RCC->CFGR &= (uint32_t)((uint32_t)~(RCC_CFGR_SW)); in SetSysClockTo72()
/bsp/hk32/libraries/HK32F0xx_StdPeriph_Driver/CMSIS/HK32F0xx/Source/
A Dsystem_hk32f0xx.c313 RCC->CFGR &= (uint32_t)((uint32_t)~(RCC_CFGR_SW)); in SetSysClock()
/bsp/stm32/libraries/STM32L1xx_HAL/STM32L1xx_HAL_Driver/Src/
A Dstm32l1xx_ll_rcc.c99 …CLEAR_BIT(vl_mask, (RCC_CFGR_SW | RCC_CFGR_HPRE | RCC_CFGR_PPRE1 | RCC_CFGR_PPRE2 | RCC_CFGR_MCOSE… in LL_RCC_DeInit()
A Dstm32l1xx_hal_rcc.c253 CLEAR_BIT(RCC->CFGR, RCC_CFGR_SW); in HAL_RCC_DeInit()
1281 RCC_ClkInitStruct->SYSCLKSource = (uint32_t)(RCC->CFGR & RCC_CFGR_SW); in HAL_RCC_GetClockConfig()
/bsp/mm32f327x/Libraries/MM32F327x/HAL_Lib/Src/
A Dhal_rcc.c49 CLEAR_BIT(RCC->CFGR, RCC_CFGR_SW); in RCC_DeInit()
180 MODIFY_REG(RCC->CFGR, RCC_CFGR_SW, (sys_clk_source << RCC_CFGR_SW_Pos)); in RCC_SYSCLKConfig()
/bsp/mm32f327x/Libraries/MM32F327x/Include/
A Dreg_rcc.h134 #define RCC_CFGR_SW (0x03U << RCC_CFGR_SW_Pos) ///< SW[1:0] bits (… macro
/bsp/ft32/libraries/FT32F0xx/FT32F0xx_Driver/Src/
A Dft32f0xx_rcc.c581 tmpreg &= ~RCC_CFGR_SW; in RCC_SYSCLKConfig()
/bsp/hk32/libraries/HK32F0xx_StdPeriph_Driver/src/
A Dhk32f0xx_rcc.c741 tmpreg &= ~RCC_CFGR_SW; in RCC_SYSCLKConfig()
/bsp/stm32/libraries/STM32L1xx_HAL/STM32L1xx_HAL_Driver/Inc/
A Dstm32l1xx_ll_rcc.h912 MODIFY_REG(RCC->CFGR, RCC_CFGR_SW, Source); in LL_RCC_SetSysClkSource()
A Dstm32l1xx_hal_rcc.h1605 MODIFY_REG(RCC->CFGR, RCC_CFGR_SW, (__SYSCLKSOURCE__))
/bsp/ft32/libraries/FT32F0xx/CMSIS/FT32F0xx/Include/
A Dft32f030x6.h2264 #define RCC_CFGR_SW ((uint32_t)0x00000003) /*!< SW[1:0] bits (Syste… macro
A Dft32f030x8.h2303 #define RCC_CFGR_SW ((uint32_t)0x00000003) /*!< SW[1:0] bits (Syste… macro
A Dft32f072x8.h2341 #define RCC_CFGR_SW ((uint32_t)0x00000003) /*!< SW[1:0] bits (Syste… macro
A Dft32f032x8.h2345 #define RCC_CFGR_SW ((uint32_t)0x00000003) /*!< SW[1:0] bits (Syste… macro
A Dft32f032x6.h2344 #define RCC_CFGR_SW ((uint32_t)0x00000003) /*!< SW[1:0] bits (Syste… macro
A Dft32f072xb.h2570 #define RCC_CFGR_SW ((uint32_t)0x00000003) /*!< SW[1:0] bits (Syste… macro
/bsp/mm32l3xx/Libraries/MM32L3xx/Include/
A DMM32L3xx.h1222 #define RCC_CFGR_SW ((uint32_t)0x00000003) /*!< SW[1:0] bits (Syste… macro
/bsp/mm32f103x/Libraries/MM32F103/Include/
A DMM32F103.h1231 #define RCC_CFGR_SW ((uint32_t)0x00000003) /*!< SW[1:0] bits (Syste… macro
/bsp/tkm32F499/Libraries/CMSIS_and_startup/
A Dtk499.h1559 #define RCC_CFGR_SW ((uint32_t)0x00000003) /*!< SW[1:0] bits (Syste… macro
/bsp/mm32l07x/Libraries/MM32L0xx/Include/
A DMM32L0xx.h1208 #define RCC_CFGR_SW ((uint32_t)0x00000003) /*!< SW[1:0] bits (Syste… macro

Completed in 860 milliseconds

123