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Searched refs:RCC_CFGR_SWS (Results 1 – 25 of 61) sorted by relevance

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/bsp/ft32/libraries/FT32F0xx/CMSIS/FT32F0xx/source/
A Dsystem_ft32f0xx.c200 tmp = RCC->CFGR & RCC_CFGR_SWS; in SystemCoreClockUpdate()
318 while ((RCC->CFGR & (uint32_t)RCC_CFGR_SWS) != (uint32_t)RCC_CFGR_SWS_HSE) in SetSysClockToHSE()
387 while ((RCC->CFGR & (uint32_t)RCC_CFGR_SWS) != (uint32_t)RCC_CFGR_SWS_PLL) in SetSysClockTo24()
456 while ((RCC->CFGR & (uint32_t)RCC_CFGR_SWS) != (uint32_t)RCC_CFGR_SWS_PLL) in SetSysClockTo36()
525 while ((RCC->CFGR & (uint32_t)RCC_CFGR_SWS) != (uint32_t)RCC_CFGR_SWS_PLL) in SetSysClockTo48()
594 while ((RCC->CFGR & (uint32_t)RCC_CFGR_SWS) != (uint32_t)RCC_CFGR_SWS_PLL) in SetSysClockTo56()
663 while ((RCC->CFGR & (uint32_t)RCC_CFGR_SWS) != (uint32_t)RCC_CFGR_SWS_PLL) in SetSysClockTo72()
732 while ((RCC->CFGR & (uint32_t)RCC_CFGR_SWS) != (uint32_t)RCC_CFGR_SWS_PLL) in SetSysClockTo96()
/bsp/mm32l3xx/Libraries/MM32L3xx/Source/
A Dsystem_MM32L3xx.c312 while ((RCC->CFGR & (uint32_t)RCC_CFGR_SWS) != (uint32_t)0x04) in SetSysClockToHSE()
400 while ((RCC->CFGR & (uint32_t)RCC_CFGR_SWS) != (uint32_t)0x08) in SetSysClockTo24()
488 while ((RCC->CFGR & (uint32_t)RCC_CFGR_SWS) != (uint32_t)0x08) in SetSysClockTo36()
574 while ((RCC->CFGR & (uint32_t)RCC_CFGR_SWS) != (uint32_t)0x08) in SetSysClockTo48()
662 while ((RCC->CFGR & (uint32_t)RCC_CFGR_SWS) != (uint32_t)0x08) in SetSysClockTo56()
750 while ((RCC->CFGR & (uint32_t)RCC_CFGR_SWS) != (uint32_t)0x08) in SetSysClockTo72()
837 while ((RCC->CFGR & (uint32_t)RCC_CFGR_SWS) != (uint32_t)0x08) in SetSysClockTo96()
/bsp/mm32f103x/Libraries/MM32F103/Source/
A Dsystem_MM32F103.c314 while ((RCC->CFGR & (uint32_t)RCC_CFGR_SWS) != (uint32_t)0x04) in SetSysClockToHSE()
405 while ((RCC->CFGR & (uint32_t)RCC_CFGR_SWS) != (uint32_t)0x08) in SetSysClockTo24()
496 while ((RCC->CFGR & (uint32_t)RCC_CFGR_SWS) != (uint32_t)0x08) in SetSysClockTo36()
585 while ((RCC->CFGR & (uint32_t)RCC_CFGR_SWS) != (uint32_t)0x08) in SetSysClockTo48()
676 while ((RCC->CFGR & (uint32_t)RCC_CFGR_SWS) != (uint32_t)0x08) in SetSysClockTo56()
767 while ((RCC->CFGR & (uint32_t)RCC_CFGR_SWS) != (uint32_t)0x08) in SetSysClockTo72()
857 while ((RCC->CFGR & (uint32_t)RCC_CFGR_SWS) != (uint32_t)0x08) in SetSysClockTo96()
/bsp/airm2m/air32f103/libraries/AIR32F10xLib/src/
A Dsystem_air32f10x.c319 tmp = RCC->CFGR & RCC_CFGR_SWS; in SystemCoreClockUpdate()
562 while ((RCC->CFGR & (uint32_t)RCC_CFGR_SWS) != (uint32_t)0x04) in SetSysClockToHSE()
666 while ((RCC->CFGR & (uint32_t)RCC_CFGR_SWS) != (uint32_t)0x08) in SetSysClockTo24()
767 while ((RCC->CFGR & (uint32_t)RCC_CFGR_SWS) != (uint32_t)0x08) in SetSysClockTo36()
867 while ((RCC->CFGR & (uint32_t)RCC_CFGR_SWS) != (uint32_t)0x08) in SetSysClockTo48()
969 while ((RCC->CFGR & (uint32_t)RCC_CFGR_SWS) != (uint32_t)0x08) in SetSysClockTo56()
1072 while ((RCC->CFGR & (uint32_t)RCC_CFGR_SWS) != (uint32_t)0x08) in SetSysClockTo72()
/bsp/hk32/libraries/HK32F0xx_StdPeriph_Driver/CMSIS/HK32F0xx/Source/
A Dsystem_hk32f0xx.c212 tmp = RCC->CFGR & RCC_CFGR_SWS; in SystemCoreClockUpdate()
317 while ((RCC->CFGR & (uint32_t)RCC_CFGR_SWS) != (uint32_t)RCC_CFGR_SWS_PLL) in SetSysClock()
/bsp/mm32l07x/Libraries/MM32L0xx/Source/
A Dsystem_MM32L0xx.c293 while ((RCC->CFGR & (uint32_t)RCC_CFGR_SWS) != (uint32_t)0x04) in SetSysClockToHSE()
379 while ((RCC->CFGR & (uint32_t)RCC_CFGR_SWS) != (uint32_t)0x08) in SetSysClockTo24()
466 while ((RCC->CFGR & (uint32_t)RCC_CFGR_SWS) != (uint32_t)0x08) in SetSysClockTo36()
552 while ((RCC->CFGR & (uint32_t)RCC_CFGR_SWS) != (uint32_t)0x08) in SetSysClockTo48()
/bsp/mm32f327x/Libraries/MM32F327x/Source/
A Dsystem_mm32f327x.c326 while ((RCC->CFGR & (u32)RCC_CFGR_SWS) != (u32)0x04) { in SetSysClockToHSE()
400 while ((RCC->CFGR & (u32)RCC_CFGR_SWS) != (u32)0x08) { in SetSysClockTo24()
473 while ((RCC->CFGR & (u32)RCC_CFGR_SWS) != (u32)0x08) { in SetSysClockTo36()
546 while ((RCC->CFGR & (u32)RCC_CFGR_SWS) != (u32)0x08) { in SetSysClockTo48()
648 while ((RCC->CFGR & (u32)RCC_CFGR_SWS) != (u32)RCC_CFGR_SWS_PLL) { in SetSysClockToXX()
835 while ((RCC->CFGR & (u32)RCC_CFGR_SWS) != (u32)RCC_CFGR_SWS_PLL) { in SetSysClockToXX_HSI()
/bsp/stm32/stm32g474-st-nucleo/board/CubeMX_Config/Src/
A Dsystem_stm32g4xx.c218 switch (RCC->CFGR & RCC_CFGR_SWS) in SystemCoreClockUpdate()
/bsp/stm32/stm32g491-st-nucleo/board/CubeMX_Config/Core/Src/
A Dsystem_stm32g4xx.c233 switch (RCC->CFGR & RCC_CFGR_SWS) in SystemCoreClockUpdate()
/bsp/stm32/stm32l496-st-discovery/board/CubeMX_Config/Src/
A Dsystem_stm32l4xx.c268 switch (RCC->CFGR & RCC_CFGR_SWS) in SystemCoreClockUpdate()
/bsp/stm32/stm32h7s7-st-disco/board/CubeMX_Config/Appli/Core/Src/
A Dsystem_stm32h7rsxx.c220 switch (RCC->CFGR & RCC_CFGR_SWS) in SystemCoreClockUpdate()
/bsp/stm32/stm32h7s7-st-disco/board/CubeMX_Config/Boot/Core/Src/
A Dsystem_stm32h7rsxx.c220 switch (RCC->CFGR & RCC_CFGR_SWS) in SystemCoreClockUpdate()
/bsp/stm32/libraries/STM32L1xx_HAL/CMSIS/Device/ST/STM32L1xx/Source/Templates/
A Dsystem_stm32l1xx.c215 tmp = RCC->CFGR & RCC_CFGR_SWS; in SystemCoreClockUpdate()
/bsp/stm32/stm32h747-st-discovery/board/CubeMX_Config/Common/Src/
A Dsystem_stm32h7xx_dualcore_boot_cm4_cm7.c283 switch (RCC->CFGR & RCC_CFGR_SWS) in SystemCoreClockUpdate()
/bsp/stm32/stm32h750-weact-ministm32h7xx/board/CubeMX_Config/Src/
A Dsystem_stm32h7xx.c320 switch (RCC->CFGR & RCC_CFGR_SWS) in SystemCoreClockUpdate()
/bsp/ft32/libraries/FT32F0xx/FT32F0xx_Driver/Src/
A Dft32f0xx_rcc.c602 return ((uint8_t)(RCC->CFGR & RCC_CFGR_SWS)); in RCC_GetSYSCLKSource()
847 tmp = RCC->CFGR & RCC_CFGR_SWS; in RCC_GetClocksFreq()
/bsp/hk32/libraries/HK32F0xx_StdPeriph_Driver/src/
A Dhk32f0xx_rcc.c761 return ((uint8_t)(RCC->CFGR & RCC_CFGR_SWS)); in RCC_GetSYSCLKSource()
975 tmp = RCC->CFGR & RCC_CFGR_SWS; in RCC_GetClocksFreq()
/bsp/stm32/stm32h750-fk750m1-vbt6/board/CubeMX_Config/Src/
A Dsystem_stm32h7xx.c349 switch (RCC->CFGR & RCC_CFGR_SWS) in SystemCoreClockUpdate()
/bsp/mm32f327x/Libraries/MM32F327x/HAL_Lib/Src/
A Dhal_rcc.c265 return ((u8)READ_BIT(RCC->CFGR, RCC_CFGR_SWS)); in RCC_GetSYSCLKSource()
414 switch (RCC->CFGR & RCC_CFGR_SWS) { in RCC_GetSysClockFreq()
/bsp/stm32/libraries/STM32L1xx_HAL/STM32L1xx_HAL_Driver/Src/
A Dstm32l1xx_hal_rcc.c256 while (READ_BIT(RCC->CFGR, RCC_CFGR_SWS) != 0U) in HAL_RCC_DeInit()
1090 switch (tmpreg & RCC_CFGR_SWS) in HAL_RCC_GetSysClockFreq()
/bsp/stm32/stm32f407-lckfb-skystar/board/CubeMX_Config/Src/
A Dsystem_stm32f4xx.c225 tmp = RCC->CFGR & RCC_CFGR_SWS; in SystemCoreClockUpdate()
/bsp/mm32f327x/Libraries/MM32F327x/Include/
A Dreg_rcc.h141 #define RCC_CFGR_SWS (0x03U << RCC_CFGR_SWS_Pos) ///< SWS[1:0] bits … macro
/bsp/stm32/libraries/STM32L1xx_HAL/STM32L1xx_HAL_Driver/Inc/
A Dstm32l1xx_ll_rcc.h926 return (uint32_t)(READ_BIT(RCC->CFGR, RCC_CFGR_SWS)); in LL_RCC_GetSysClkSource()
A Dstm32l1xx_hal_rcc.h1615 #define __HAL_RCC_GET_SYSCLK_SOURCE() ((uint32_t)(READ_BIT(RCC->CFGR,RCC_CFGR_SWS)))
/bsp/ft32/libraries/FT32F0xx/CMSIS/FT32F0xx/Include/
A Dft32f030x6.h2273 #define RCC_CFGR_SWS ((uint32_t)0x0000000C) /*!< SWS[1:0] bits (Syst… macro

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