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Searched refs:RCC_CFGR_SW_PLL (Results 1 – 25 of 48) sorted by relevance

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/bsp/mm32l3xx/Libraries/MM32L3xx/Source/
A Dsystem_MM32L3xx.c397 RCC->CFGR |= (uint32_t)RCC_CFGR_SW_PLL; in SetSysClockTo24()
485 RCC->CFGR |= (uint32_t)RCC_CFGR_SW_PLL; in SetSysClockTo36()
571 RCC->CFGR |= (uint32_t)RCC_CFGR_SW_PLL; in SetSysClockTo48()
659 RCC->CFGR |= (uint32_t)RCC_CFGR_SW_PLL; in SetSysClockTo56()
747 RCC->CFGR |= (uint32_t)RCC_CFGR_SW_PLL; in SetSysClockTo72()
834 RCC->CFGR |= (uint32_t)RCC_CFGR_SW_PLL; in SetSysClockTo96()
870 RCC->CFGR|=RCC_CFGR_SW_PLL;//PLL��Ϊϵͳʱ�� in SetSysClockTo48_HSI()
897 RCC->CFGR|=RCC_CFGR_SW_PLL;//PLL��Ϊϵͳʱ�� in SetSysClockTo72_HSI()
924 RCC->CFGR|=RCC_CFGR_SW_PLL;//PLL��Ϊϵͳʱ�� in SetSysClockTo96_HSI()
/bsp/mm32f103x/Libraries/MM32F103/Source/
A Dsystem_MM32F103.c402 RCC->CFGR |= (uint32_t)RCC_CFGR_SW_PLL; in SetSysClockTo24()
493 RCC->CFGR |= (uint32_t)RCC_CFGR_SW_PLL; in SetSysClockTo36()
582 RCC->CFGR |= (uint32_t)RCC_CFGR_SW_PLL; in SetSysClockTo48()
673 RCC->CFGR |= (uint32_t)RCC_CFGR_SW_PLL; in SetSysClockTo56()
764 RCC->CFGR |= (uint32_t)RCC_CFGR_SW_PLL; in SetSysClockTo72()
854 RCC->CFGR |= (uint32_t)RCC_CFGR_SW_PLL; in SetSysClockTo96()
891 RCC->CFGR |= RCC_CFGR_SW_PLL; //PLL��Ϊϵͳʱ�� in SetSysClockTo48_HSI()
918 RCC->CFGR |= RCC_CFGR_SW_PLL; //PLL��Ϊϵͳʱ�� in SetSysClockTo72_HSI()
945 RCC->CFGR |= RCC_CFGR_SW_PLL; //PLL��Ϊϵͳʱ�� in SetSysClockTo96_HSI()
/bsp/mm32l07x/Libraries/MM32L0xx/Source/
A Dsystem_MM32L0xx.c376 RCC->CFGR |= (uint32_t)RCC_CFGR_SW_PLL; in SetSysClockTo24()
463 RCC->CFGR |= (uint32_t)RCC_CFGR_SW_PLL; in SetSysClockTo36()
549 RCC->CFGR |= (uint32_t)RCC_CFGR_SW_PLL; in SetSysClockTo48()
583 RCC->CFGR|=RCC_CFGR_SW_PLL;//PLL��Ϊϵͳʱ�� in SetSysClockTo24_HSI()
612 RCC->CFGR|=RCC_CFGR_SW_PLL;//PLL��Ϊϵͳʱ�� in SetSysClockTo36_HSI()
641 RCC->CFGR|=RCC_CFGR_SW_PLL;//PLL��Ϊϵͳʱ�� in SetSysClockTo48_HSI()
/bsp/ft32/libraries/FT32F0xx/CMSIS/FT32F0xx/source/
A Dsystem_ft32f0xx.c384 RCC->CFGR |= (uint32_t)RCC_CFGR_SW_PLL; in SetSysClockTo24()
453 RCC->CFGR |= (uint32_t)RCC_CFGR_SW_PLL; in SetSysClockTo36()
522 RCC->CFGR |= (uint32_t)RCC_CFGR_SW_PLL; in SetSysClockTo48()
591 RCC->CFGR |= (uint32_t)RCC_CFGR_SW_PLL; in SetSysClockTo56()
660 RCC->CFGR |= (uint32_t)RCC_CFGR_SW_PLL; in SetSysClockTo72()
729 RCC->CFGR |= (uint32_t)RCC_CFGR_SW_PLL; in SetSysClockTo96()
/bsp/mm32f327x/Libraries/MM32F327x/Source/
A Dsystem_mm32f327x.c397 RCC->CFGR |= (u32)RCC_CFGR_SW_PLL; in SetSysClockTo24()
470 RCC->CFGR |= (u32)RCC_CFGR_SW_PLL; in SetSysClockTo36()
543 RCC->CFGR |= (u32)RCC_CFGR_SW_PLL; in SetSysClockTo48()
645 RCC->CFGR |= (u32)RCC_CFGR_SW_PLL; in SetSysClockToXX()
689 RCC->CFGR |= RCC_CFGR_SW_PLL; in SetSysClockTo24_HSI()
721 RCC->CFGR |= RCC_CFGR_SW_PLL; in SetSysClockTo36_HSI()
758 RCC->CFGR |= RCC_CFGR_SW_PLL; in SetSysClockTo48_HSI()
832 RCC->CFGR |= (u32)RCC_CFGR_SW_PLL; in SetSysClockToXX_HSI()
/bsp/airm2m/air32f103/libraries/AIR32F10xLib/src/
A Dsystem_air32f10x.c663 RCC->CFGR |= (uint32_t)RCC_CFGR_SW_PLL; in SetSysClockTo24()
764 RCC->CFGR |= (uint32_t)RCC_CFGR_SW_PLL; in SetSysClockTo36()
864 RCC->CFGR |= (uint32_t)RCC_CFGR_SW_PLL; in SetSysClockTo48()
966 RCC->CFGR |= (uint32_t)RCC_CFGR_SW_PLL; in SetSysClockTo56()
1069 RCC->CFGR |= (uint32_t)RCC_CFGR_SW_PLL; in SetSysClockTo72()
/bsp/hk32/libraries/HK32F0xx_StdPeriph_Driver/CMSIS/HK32F0xx/Source/
A Dsystem_hk32f0xx.c314 RCC->CFGR |= (uint32_t)RCC_CFGR_SW_PLL; in SetSysClock()
/bsp/mm32f327x/Libraries/MM32F327x/Include/
A Dreg_rcc.h137 #define RCC_CFGR_SW_PLL (0x02U << RCC_CFGR_SW_Pos) ///< PLL selected a… macro
/bsp/hk32/libraries/HK32F0xx_StdPeriph_Driver/inc/
A Dhk32f0xx_rcc.h148 #define RCC_SYSCLKSource_PLLCLK RCC_CFGR_SW_PLL
/bsp/ft32/libraries/FT32F0xx/FT32F0xx_Driver/Inc/
A Dft32f0xx_rcc.h153 #define RCC_SYSCLKSource_PLLCLK RCC_CFGR_SW_PLL
/bsp/stm32/libraries/STM32L1xx_HAL/STM32L1xx_HAL_Driver/Inc/
A Dstm32l1xx_ll_rcc.h196 #define LL_RCC_SYS_CLKSOURCE_PLL RCC_CFGR_SW_PLL /*!< PLL selection as system clock */
A Dstm32l1xx_hal_rcc.h439 #define RCC_SYSCLKSOURCE_PLLCLK RCC_CFGR_SW_PLL /*!< PLL selected as system clock */
/bsp/ft32/libraries/FT32F0xx/CMSIS/FT32F0xx/Include/
A Dft32f030x6.h2270 #define RCC_CFGR_SW_PLL ((uint32_t)0x00000002) /*!< PLL selected as sys… macro
A Dft32f030x8.h2309 #define RCC_CFGR_SW_PLL ((uint32_t)0x00000002) /*!< PLL selected as sys… macro
A Dft32f072x8.h2347 #define RCC_CFGR_SW_PLL ((uint32_t)0x00000002) /*!< PLL selected as sys… macro
A Dft32f032x8.h2351 #define RCC_CFGR_SW_PLL ((uint32_t)0x00000002) /*!< PLL selected as sys… macro
A Dft32f032x6.h2350 #define RCC_CFGR_SW_PLL ((uint32_t)0x00000002) /*!< PLL selected as sys… macro
A Dft32f072xb.h2576 #define RCC_CFGR_SW_PLL ((uint32_t)0x00000002) /*!< PLL selected as sys… macro
/bsp/mm32l3xx/Libraries/MM32L3xx/Include/
A DMM32L3xx.h1229 #define RCC_CFGR_SW_PLL ((uint32_t)0x00000002) /*!< PLL selected as sys… macro
/bsp/mm32f103x/Libraries/MM32F103/Include/
A DMM32F103.h1238 #define RCC_CFGR_SW_PLL ((uint32_t)0x00000002) /*!< PLL selected as sys… macro
/bsp/tkm32F499/Libraries/CMSIS_and_startup/
A Dtk499.h1566 #define RCC_CFGR_SW_PLL ((uint32_t)0x00000002) /*!< PLL selected as sys… macro
/bsp/mm32l07x/Libraries/MM32L0xx/Include/
A DMM32L0xx.h1215 #define RCC_CFGR_SW_PLL ((uint32_t)0x00000002) /*!< PLL selected as sys… macro
/bsp/hk32/libraries/HK32F0xx_StdPeriph_Driver/CMSIS/HK32F0xx/Include/
A Dhk32f030x4x6x8.h2918 #define RCC_CFGR_SW_PLL (0x00000002U) /*!< PLL selected as… macro
A Dhk32f031x4x6.h2988 #define RCC_CFGR_SW_PLL (0x00000002U) /*!< PLL selected as… macro
A Dhk32f04ax4x6x8.h2913 #define RCC_CFGR_SW_PLL (0x00000002U) /*!< PLL selected as… macro

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