Home
last modified time | relevance | path

Searched refs:RCC_CIR_PLLRDYF_Pos (Results 1 – 25 of 26) sorted by relevance

12

/bsp/mm32f327x/Libraries/MM32F327x/Include/
A Dreg_rcc.h218 #define RCC_CIR_PLLRDYF_Pos (4) macro
219 #define RCC_CIR_PLLRDYF (0x01U << RCC_CIR_PLLRDYF_Pos) ///< PLL Ready Inte…
/bsp/hk32/libraries/HK32F0xx_StdPeriph_Driver/CMSIS/HK32F0xx/Include/
A Dhk32f030x4x6x8.h3074 #define RCC_CIR_PLLRDYF_Pos (4U) macro
3075 #define RCC_CIR_PLLRDYF_Msk (0x1U << RCC_CIR_PLLRDYF_Pos) /*!< 0x00000010 */
A Dhk32f031x4x6.h3147 #define RCC_CIR_PLLRDYF_Pos (4U) macro
3148 #define RCC_CIR_PLLRDYF_Msk (0x1U << RCC_CIR_PLLRDYF_Pos) /*!< 0x00000010 */
A Dhk32f04ax4x6x8.h3056 #define RCC_CIR_PLLRDYF_Pos (4U) macro
3057 #define RCC_CIR_PLLRDYF_Msk (0x1U << RCC_CIR_PLLRDYF_Pos) /*!< 0x00000010 */
/bsp/stm32/libraries/STM32L1xx_HAL/CMSIS/Device/ST/STM32L1xx/Include/
A Dstm32l100xb.h4090 #define RCC_CIR_PLLRDYF_Pos (4U) macro
4091 #define RCC_CIR_PLLRDYF_Msk (0x1UL << RCC_CIR_PLLRDYF_Pos) /*!< 0x00000010 */
A Dstm32l100xba.h4101 #define RCC_CIR_PLLRDYF_Pos (4U) macro
4102 #define RCC_CIR_PLLRDYF_Msk (0x1UL << RCC_CIR_PLLRDYF_Pos) /*!< 0x00000010 */
A Dstm32l151xb.h3975 #define RCC_CIR_PLLRDYF_Pos (4U) macro
3976 #define RCC_CIR_PLLRDYF_Msk (0x1UL << RCC_CIR_PLLRDYF_Pos) /*!< 0x00000010 */
A Dstm32l151xba.h3989 #define RCC_CIR_PLLRDYF_Pos (4U) macro
3990 #define RCC_CIR_PLLRDYF_Msk (0x1UL << RCC_CIR_PLLRDYF_Pos) /*!< 0x00000010 */
A Dstm32l152xb.h4108 #define RCC_CIR_PLLRDYF_Pos (4U) macro
4109 #define RCC_CIR_PLLRDYF_Msk (0x1UL << RCC_CIR_PLLRDYF_Pos) /*!< 0x00000010 */
A Dstm32l152xba.h4107 #define RCC_CIR_PLLRDYF_Pos (4U) macro
4108 #define RCC_CIR_PLLRDYF_Msk (0x1UL << RCC_CIR_PLLRDYF_Pos) /*!< 0x00000010 */
A Dstm32l100xc.h4203 #define RCC_CIR_PLLRDYF_Pos (4U) macro
4204 #define RCC_CIR_PLLRDYF_Msk (0x1UL << RCC_CIR_PLLRDYF_Pos) /*!< 0x00000010 */
A Dstm32l162xdx.h4582 #define RCC_CIR_PLLRDYF_Pos (4U) macro
4583 #define RCC_CIR_PLLRDYF_Msk (0x1UL << RCC_CIR_PLLRDYF_Pos) /*!< 0x00000010 */
A Dstm32l162xe.h4582 #define RCC_CIR_PLLRDYF_Pos (4U) macro
4583 #define RCC_CIR_PLLRDYF_Msk (0x1UL << RCC_CIR_PLLRDYF_Pos) /*!< 0x00000010 */
A Dstm32l152xc.h4368 #define RCC_CIR_PLLRDYF_Pos (4U) macro
4369 #define RCC_CIR_PLLRDYF_Msk (0x1UL << RCC_CIR_PLLRDYF_Pos) /*!< 0x00000010 */
A Dstm32l152xca.h4405 #define RCC_CIR_PLLRDYF_Pos (4U) macro
4406 #define RCC_CIR_PLLRDYF_Msk (0x1UL << RCC_CIR_PLLRDYF_Pos) /*!< 0x00000010 */
A Dstm32l152xe.h4452 #define RCC_CIR_PLLRDYF_Pos (4U) macro
4453 #define RCC_CIR_PLLRDYF_Msk (0x1UL << RCC_CIR_PLLRDYF_Pos) /*!< 0x00000010 */
A Dstm32l162xc.h4498 #define RCC_CIR_PLLRDYF_Pos (4U) macro
4499 #define RCC_CIR_PLLRDYF_Msk (0x1UL << RCC_CIR_PLLRDYF_Pos) /*!< 0x00000010 */
A Dstm32l162xca.h4535 #define RCC_CIR_PLLRDYF_Pos (4U) macro
4536 #define RCC_CIR_PLLRDYF_Msk (0x1UL << RCC_CIR_PLLRDYF_Pos) /*!< 0x00000010 */
A Dstm32l151xca.h4272 #define RCC_CIR_PLLRDYF_Pos (4U) macro
4273 #define RCC_CIR_PLLRDYF_Msk (0x1UL << RCC_CIR_PLLRDYF_Pos) /*!< 0x00000010 */
A Dstm32l151xdx.h4319 #define RCC_CIR_PLLRDYF_Pos (4U) macro
4320 #define RCC_CIR_PLLRDYF_Msk (0x1UL << RCC_CIR_PLLRDYF_Pos) /*!< 0x00000010 */
A Dstm32l151xe.h4319 #define RCC_CIR_PLLRDYF_Pos (4U) macro
4320 #define RCC_CIR_PLLRDYF_Msk (0x1UL << RCC_CIR_PLLRDYF_Pos) /*!< 0x00000010 */
A Dstm32l151xc.h4235 #define RCC_CIR_PLLRDYF_Pos (4U) macro
4236 #define RCC_CIR_PLLRDYF_Msk (0x1UL << RCC_CIR_PLLRDYF_Pos) /*!< 0x00000010 */
A Dstm32l152xdx.h4452 #define RCC_CIR_PLLRDYF_Pos (4U) macro
4453 #define RCC_CIR_PLLRDYF_Msk (0x1UL << RCC_CIR_PLLRDYF_Pos) /*!< 0x00000010 */
A Dstm32l151xd.h4579 #define RCC_CIR_PLLRDYF_Pos (4U) macro
4580 #define RCC_CIR_PLLRDYF_Msk (0x1UL << RCC_CIR_PLLRDYF_Pos) /*!< 0x00000010 */
A Dstm32l152xd.h4712 #define RCC_CIR_PLLRDYF_Pos (4U) macro
4713 #define RCC_CIR_PLLRDYF_Msk (0x1UL << RCC_CIR_PLLRDYF_Pos) /*!< 0x00000010 */

Completed in 1885 milliseconds

12