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Searched refs:RCC_CSR_PORRSTF_Pos (Results 1 – 25 of 28) sorted by relevance

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/bsp/mm32f327x/Libraries/MM32F327x/Include/
A Dreg_rcc.h541 #define RCC_CSR_PORRSTF_Pos (27) macro
542 #define RCC_CSR_PORRSTF (0x01U << RCC_CSR_PORRSTF_Pos) ///< POR/PDR reset …
/bsp/mm32f327x/Libraries/MM32F327x/HAL_Lib/Inc/
A Dhal_rcc.h88 …RCC_FLAG_PORRST = ((u8)((CSR_REG_INDEX << 5U) | RCC_CSR_PORRSTF_Pos)), ///< POR/PDR reset flag
/bsp/stm32/libraries/STM32L1xx_HAL/STM32L1xx_HAL_Driver/Inc/
A Dstm32l1xx_hal_rcc.h615 #define RCC_FLAG_PORRST ((uint8_t)((CSR_REG_INDEX << 5U) | RCC_CSR_PORRSTF_Pos)) …
/bsp/hk32/libraries/HK32F0xx_StdPeriph_Driver/CMSIS/HK32F0xx/Include/
A Dhk32f030x4x6x8.h3334 #define RCC_CSR_PORRSTF_Pos (27U) macro
3335 #define RCC_CSR_PORRSTF_Msk (0x1U << RCC_CSR_PORRSTF_Pos) /*!< 0x08000000 */
A Dhk32f031x4x6.h3380 #define RCC_CSR_PORRSTF_Pos (27U) macro
3381 #define RCC_CSR_PORRSTF_Msk (0x1U << RCC_CSR_PORRSTF_Pos) /*!< 0x08000000 */
A Dhk32f04ax4x6x8.h3326 #define RCC_CSR_PORRSTF_Pos (27U) macro
3327 #define RCC_CSR_PORRSTF_Msk (0x1U << RCC_CSR_PORRSTF_Pos) /*!< 0x08000000 */
/bsp/stm32/libraries/STM32L1xx_HAL/CMSIS/Device/ST/STM32L1xx/Include/
A Dstm32l100xb.h4496 #define RCC_CSR_PORRSTF_Pos (27U) macro
4497 #define RCC_CSR_PORRSTF_Msk (0x1UL << RCC_CSR_PORRSTF_Pos) /*!< 0x08000000 */
A Dstm32l100xba.h4523 #define RCC_CSR_PORRSTF_Pos (27U) macro
4524 #define RCC_CSR_PORRSTF_Msk (0x1UL << RCC_CSR_PORRSTF_Pos) /*!< 0x08000000 */
A Dstm32l151xb.h4381 #define RCC_CSR_PORRSTF_Pos (27U) macro
4382 #define RCC_CSR_PORRSTF_Msk (0x1UL << RCC_CSR_PORRSTF_Pos) /*!< 0x08000000 */
A Dstm32l151xba.h4411 #define RCC_CSR_PORRSTF_Pos (27U) macro
4412 #define RCC_CSR_PORRSTF_Msk (0x1UL << RCC_CSR_PORRSTF_Pos) /*!< 0x08000000 */
A Dstm32l152xb.h4523 #define RCC_CSR_PORRSTF_Pos (27U) macro
4524 #define RCC_CSR_PORRSTF_Msk (0x1UL << RCC_CSR_PORRSTF_Pos) /*!< 0x08000000 */
A Dstm32l152xba.h4538 #define RCC_CSR_PORRSTF_Pos (27U) macro
4539 #define RCC_CSR_PORRSTF_Msk (0x1UL << RCC_CSR_PORRSTF_Pos) /*!< 0x08000000 */
A Dstm32l100xc.h4643 #define RCC_CSR_PORRSTF_Pos (27U) macro
4644 #define RCC_CSR_PORRSTF_Msk (0x1UL << RCC_CSR_PORRSTF_Pos) /*!< 0x08000000 */
A Dstm32l162xdx.h5085 #define RCC_CSR_PORRSTF_Pos (27U) macro
5086 #define RCC_CSR_PORRSTF_Msk (0x1UL << RCC_CSR_PORRSTF_Pos) /*!< 0x08000000 */
A Dstm32l162xe.h5085 #define RCC_CSR_PORRSTF_Pos (27U) macro
5086 #define RCC_CSR_PORRSTF_Msk (0x1UL << RCC_CSR_PORRSTF_Pos) /*!< 0x08000000 */
A Dstm32l152xc.h4826 #define RCC_CSR_PORRSTF_Pos (27U) macro
4827 #define RCC_CSR_PORRSTF_Msk (0x1UL << RCC_CSR_PORRSTF_Pos) /*!< 0x08000000 */
A Dstm32l152xca.h4881 #define RCC_CSR_PORRSTF_Pos (27U) macro
4882 #define RCC_CSR_PORRSTF_Msk (0x1UL << RCC_CSR_PORRSTF_Pos) /*!< 0x08000000 */
A Dstm32l152xe.h4946 #define RCC_CSR_PORRSTF_Pos (27U) macro
4947 #define RCC_CSR_PORRSTF_Msk (0x1UL << RCC_CSR_PORRSTF_Pos) /*!< 0x08000000 */
A Dstm32l162xc.h4965 #define RCC_CSR_PORRSTF_Pos (27U) macro
4966 #define RCC_CSR_PORRSTF_Msk (0x1UL << RCC_CSR_PORRSTF_Pos) /*!< 0x08000000 */
A Dstm32l162xca.h5020 #define RCC_CSR_PORRSTF_Pos (27U) macro
5021 #define RCC_CSR_PORRSTF_Msk (0x1UL << RCC_CSR_PORRSTF_Pos) /*!< 0x08000000 */
A Dstm32l151xca.h4739 #define RCC_CSR_PORRSTF_Pos (27U) macro
4740 #define RCC_CSR_PORRSTF_Msk (0x1UL << RCC_CSR_PORRSTF_Pos) /*!< 0x08000000 */
A Dstm32l151xdx.h4804 #define RCC_CSR_PORRSTF_Pos (27U) macro
4805 #define RCC_CSR_PORRSTF_Msk (0x1UL << RCC_CSR_PORRSTF_Pos) /*!< 0x08000000 */
A Dstm32l151xe.h4804 #define RCC_CSR_PORRSTF_Pos (27U) macro
4805 #define RCC_CSR_PORRSTF_Msk (0x1UL << RCC_CSR_PORRSTF_Pos) /*!< 0x08000000 */
A Dstm32l151xc.h4684 #define RCC_CSR_PORRSTF_Pos (27U) macro
4685 #define RCC_CSR_PORRSTF_Msk (0x1UL << RCC_CSR_PORRSTF_Pos) /*!< 0x08000000 */
A Dstm32l152xdx.h4946 #define RCC_CSR_PORRSTF_Pos (27U) macro
4947 #define RCC_CSR_PORRSTF_Msk (0x1UL << RCC_CSR_PORRSTF_Pos) /*!< 0x08000000 */

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