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Searched refs:RCC_CSR_SFTRSTF_Pos (Results 1 – 25 of 28) sorted by relevance

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/bsp/mm32f327x/Libraries/MM32F327x/Include/
A Dreg_rcc.h544 #define RCC_CSR_SFTRSTF_Pos (28) macro
545 #define RCC_CSR_SFTRSTF (0x01U << RCC_CSR_SFTRSTF_Pos) ///< Software Reset…
/bsp/mm32f327x/Libraries/MM32F327x/HAL_Lib/Inc/
A Dhal_rcc.h89 …RCC_FLAG_SFTRST = ((u8)((CSR_REG_INDEX << 5U) | RCC_CSR_SFTRSTF_Pos)), ///< Software Reset fl…
/bsp/stm32/libraries/STM32L1xx_HAL/STM32L1xx_HAL_Driver/Inc/
A Dstm32l1xx_hal_rcc.h616 #define RCC_FLAG_SFTRST ((uint8_t)((CSR_REG_INDEX << 5U) | RCC_CSR_SFTRSTF_Pos)) …
/bsp/hk32/libraries/HK32F0xx_StdPeriph_Driver/CMSIS/HK32F0xx/Include/
A Dhk32f030x4x6x8.h3337 #define RCC_CSR_SFTRSTF_Pos (28U) macro
3338 #define RCC_CSR_SFTRSTF_Msk (0x1U << RCC_CSR_SFTRSTF_Pos) /*!< 0x10000000 */
A Dhk32f031x4x6.h3383 #define RCC_CSR_SFTRSTF_Pos (28U) macro
3384 #define RCC_CSR_SFTRSTF_Msk (0x1U << RCC_CSR_SFTRSTF_Pos) /*!< 0x10000000 */
A Dhk32f04ax4x6x8.h3329 #define RCC_CSR_SFTRSTF_Pos (28U) macro
3330 #define RCC_CSR_SFTRSTF_Msk (0x1U << RCC_CSR_SFTRSTF_Pos) /*!< 0x10000000 */
/bsp/stm32/libraries/STM32L1xx_HAL/CMSIS/Device/ST/STM32L1xx/Include/
A Dstm32l100xb.h4499 #define RCC_CSR_SFTRSTF_Pos (28U) macro
4500 #define RCC_CSR_SFTRSTF_Msk (0x1UL << RCC_CSR_SFTRSTF_Pos) /*!< 0x10000000 */
A Dstm32l100xba.h4526 #define RCC_CSR_SFTRSTF_Pos (28U) macro
4527 #define RCC_CSR_SFTRSTF_Msk (0x1UL << RCC_CSR_SFTRSTF_Pos) /*!< 0x10000000 */
A Dstm32l151xb.h4384 #define RCC_CSR_SFTRSTF_Pos (28U) macro
4385 #define RCC_CSR_SFTRSTF_Msk (0x1UL << RCC_CSR_SFTRSTF_Pos) /*!< 0x10000000 */
A Dstm32l151xba.h4414 #define RCC_CSR_SFTRSTF_Pos (28U) macro
4415 #define RCC_CSR_SFTRSTF_Msk (0x1UL << RCC_CSR_SFTRSTF_Pos) /*!< 0x10000000 */
A Dstm32l152xb.h4526 #define RCC_CSR_SFTRSTF_Pos (28U) macro
4527 #define RCC_CSR_SFTRSTF_Msk (0x1UL << RCC_CSR_SFTRSTF_Pos) /*!< 0x10000000 */
A Dstm32l152xba.h4541 #define RCC_CSR_SFTRSTF_Pos (28U) macro
4542 #define RCC_CSR_SFTRSTF_Msk (0x1UL << RCC_CSR_SFTRSTF_Pos) /*!< 0x10000000 */
A Dstm32l100xc.h4646 #define RCC_CSR_SFTRSTF_Pos (28U) macro
4647 #define RCC_CSR_SFTRSTF_Msk (0x1UL << RCC_CSR_SFTRSTF_Pos) /*!< 0x10000000 */
A Dstm32l162xdx.h5088 #define RCC_CSR_SFTRSTF_Pos (28U) macro
5089 #define RCC_CSR_SFTRSTF_Msk (0x1UL << RCC_CSR_SFTRSTF_Pos) /*!< 0x10000000 */
A Dstm32l162xe.h5088 #define RCC_CSR_SFTRSTF_Pos (28U) macro
5089 #define RCC_CSR_SFTRSTF_Msk (0x1UL << RCC_CSR_SFTRSTF_Pos) /*!< 0x10000000 */
A Dstm32l152xc.h4829 #define RCC_CSR_SFTRSTF_Pos (28U) macro
4830 #define RCC_CSR_SFTRSTF_Msk (0x1UL << RCC_CSR_SFTRSTF_Pos) /*!< 0x10000000 */
A Dstm32l152xca.h4884 #define RCC_CSR_SFTRSTF_Pos (28U) macro
4885 #define RCC_CSR_SFTRSTF_Msk (0x1UL << RCC_CSR_SFTRSTF_Pos) /*!< 0x10000000 */
A Dstm32l152xe.h4949 #define RCC_CSR_SFTRSTF_Pos (28U) macro
4950 #define RCC_CSR_SFTRSTF_Msk (0x1UL << RCC_CSR_SFTRSTF_Pos) /*!< 0x10000000 */
A Dstm32l162xc.h4968 #define RCC_CSR_SFTRSTF_Pos (28U) macro
4969 #define RCC_CSR_SFTRSTF_Msk (0x1UL << RCC_CSR_SFTRSTF_Pos) /*!< 0x10000000 */
A Dstm32l162xca.h5023 #define RCC_CSR_SFTRSTF_Pos (28U) macro
5024 #define RCC_CSR_SFTRSTF_Msk (0x1UL << RCC_CSR_SFTRSTF_Pos) /*!< 0x10000000 */
A Dstm32l151xca.h4742 #define RCC_CSR_SFTRSTF_Pos (28U) macro
4743 #define RCC_CSR_SFTRSTF_Msk (0x1UL << RCC_CSR_SFTRSTF_Pos) /*!< 0x10000000 */
A Dstm32l151xdx.h4807 #define RCC_CSR_SFTRSTF_Pos (28U) macro
4808 #define RCC_CSR_SFTRSTF_Msk (0x1UL << RCC_CSR_SFTRSTF_Pos) /*!< 0x10000000 */
A Dstm32l151xe.h4807 #define RCC_CSR_SFTRSTF_Pos (28U) macro
4808 #define RCC_CSR_SFTRSTF_Msk (0x1UL << RCC_CSR_SFTRSTF_Pos) /*!< 0x10000000 */
A Dstm32l151xc.h4687 #define RCC_CSR_SFTRSTF_Pos (28U) macro
4688 #define RCC_CSR_SFTRSTF_Msk (0x1UL << RCC_CSR_SFTRSTF_Pos) /*!< 0x10000000 */
A Dstm32l152xdx.h4949 #define RCC_CSR_SFTRSTF_Pos (28U) macro
4950 #define RCC_CSR_SFTRSTF_Msk (0x1UL << RCC_CSR_SFTRSTF_Pos) /*!< 0x10000000 */

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