Home
last modified time | relevance | path

Searched refs:RCC_OFFSET (Results 1 – 17 of 17) sorted by relevance

/bsp/airm2m/air32f103/libraries/AIR32F10xLib/src/
A Dair32f10x_rcc_ex.c9 #define RCC_OFFSET (RCC_BASE - PERIPH_BASE) macro
14 #define CR_OFFSET (RCC_OFFSET + 0x00)
39 #define CFGR_OFFSET (RCC_OFFSET + 0x04)
52 #define BDCR_OFFSET (RCC_OFFSET + 0x20)
63 #define CSR_OFFSET (RCC_OFFSET + 0x24)
71 #define CFGR2_OFFSET (RCC_OFFSET + 0x2C)
A Dair32f10x_rcc.c26 #define RCC_OFFSET (RCC_BASE - PERIPH_BASE) macro
31 #define CR_OFFSET (RCC_OFFSET + 0x00)
46 #define CFGR_OFFSET (RCC_OFFSET + 0x04)
54 #define BDCR_OFFSET (RCC_OFFSET + 0x20)
65 #define CSR_OFFSET (RCC_OFFSET + 0x24)
/bsp/wch/arm/Libraries/CH32F10x_StdPeriph_Driver/StdPeriph_Driver/src/
A Dch32f10x_rcc.c11 #define RCC_OFFSET (RCC_BASE - PERIPH_BASE) macro
16 #define CTLR_OFFSET (RCC_OFFSET + 0x00)
31 #define CFGR0_OFFSET (RCC_OFFSET + 0x04)
38 #define BDCTLR_OFFSET (RCC_OFFSET + 0x20)
49 #define RSTSCKR_OFFSET (RCC_OFFSET + 0x24)
/bsp/mm32l07x/Libraries/MM32L0xx/HAL_lib/src/
A DHAL_rcc.c46 #define RCC_OFFSET (RCC_BASE - PERIPH_BASE) macro
51 #define CR_OFFSET (RCC_OFFSET + 0x00)
66 #define CFGR_OFFSET (RCC_OFFSET + 0x04)
73 #define BDCR_OFFSET (RCC_OFFSET + 0x20)
84 #define CSR_OFFSET (RCC_OFFSET + 0x24)
/bsp/mm32l3xx/Libraries/MM32L3xx/HAL_lib/src/
A DHAL_rcc.c46 #define RCC_OFFSET (RCC_BASE - PERIPH_BASE) macro
51 #define CR_OFFSET (RCC_OFFSET + 0x00)
66 #define CFGR_OFFSET (RCC_OFFSET + 0x04)
73 #define BDCR_OFFSET (RCC_OFFSET + 0x20)
84 #define CSR_OFFSET (RCC_OFFSET + 0x24)
/bsp/mm32f103x/Libraries/MM32F103/HAL_lib/src/
A DHAL_rcc.c46 #define RCC_OFFSET (RCC_BASE - PERIPH_BASE) macro
51 #define CR_OFFSET (RCC_OFFSET + 0x00)
66 #define CFGR_OFFSET (RCC_OFFSET + 0x04)
73 #define BDCR_OFFSET (RCC_OFFSET + 0x20)
84 #define CSR_OFFSET (RCC_OFFSET + 0x24)
/bsp/tkm32F499/Libraries/Hal_lib/src/
A DHAL_rcc.c48 #define RCC_OFFSET (RCC_BASE - PERIPH_BASE) macro
53 #define CR_OFFSET (RCC_OFFSET + 0x00)
68 #define CFGR_OFFSET (RCC_OFFSET + 0x04)
75 #define BDCR_OFFSET (RCC_OFFSET + 0x20)
86 #define CSR_OFFSET (RCC_OFFSET + 0x24)
/bsp/n32/libraries/N32G45x_Firmware_Library/n32g45x_std_periph_driver/src/
A Dn32g45x_rcc.c59 #define RCC_OFFSET (RCC_BASE - PERIPH_BASE) macro
64 #define CTRL_OFFSET (RCC_OFFSET + 0x00)
79 #define CFG_OFFSET (RCC_OFFSET + 0x04)
90 #define BDCTRL_OFFSET (RCC_OFFSET + 0x20)
101 #define CTRLSTS_OFFSET (RCC_OFFSET + 0x24)
/bsp/n32/libraries/N32G4FR_Firmware_Library/n32g4fr_std_periph_driver/src/
A Dn32g4fr_rcc.c59 #define RCC_OFFSET (RCC_BASE - PERIPH_BASE) macro
64 #define CTRL_OFFSET (RCC_OFFSET + 0x00)
79 #define CFG_OFFSET (RCC_OFFSET + 0x04)
90 #define BDCTRL_OFFSET (RCC_OFFSET + 0x20)
101 #define CTRLSTS_OFFSET (RCC_OFFSET + 0x24)
/bsp/n32g452xx/Libraries/N32_Std_Driver/n32g45x_std_periph_driver/src/
A Dn32g45x_rcc.c59 #define RCC_OFFSET (RCC_BASE - PERIPH_BASE) macro
64 #define CTRL_OFFSET (RCC_OFFSET + 0x00)
79 #define CFG_OFFSET (RCC_OFFSET + 0x04)
90 #define BDCTRL_OFFSET (RCC_OFFSET + 0x20)
101 #define CTRLSTS_OFFSET (RCC_OFFSET + 0x24)
/bsp/n32/libraries/N32WB452_Firmware_Library/n32wb452_std_periph_driver/src/
A Dn32wb452_rcc.c59 #define RCC_OFFSET (RCC_BASE - PERIPH_BASE) macro
64 #define CTRL_OFFSET (RCC_OFFSET + 0x00)
79 #define CFG_OFFSET (RCC_OFFSET + 0x04)
90 #define BDCTRL_OFFSET (RCC_OFFSET + 0x20)
101 #define CTRLSTS_OFFSET (RCC_OFFSET + 0x24)
/bsp/n32/libraries/N32L43x_Firmware_Library/n32l43x_std_periph_driver/src/
A Dn32l43x_rcc.c59 #define RCC_OFFSET (RCC_BASE - PERIPH_BASE) macro
64 #define CTRL_OFFSET (RCC_OFFSET + 0x00)
79 #define CFG_OFFSET (RCC_OFFSET + 0x04)
89 #define CLKINT_OFFSET (RCC_OFFSET + 0x08)
102 #define LDCTRL_OFFSET (RCC_OFFSET + 0x20)
113 #define CTRLSTS_OFFSET (RCC_OFFSET + 0x24)
/bsp/n32/libraries/N32L40x_Firmware_Library/n32l40x_std_periph_driver/src/
A Dn32l40x_rcc.c59 #define RCC_OFFSET (RCC_BASE - PERIPH_BASE) macro
64 #define CTRL_OFFSET (RCC_OFFSET + 0x00)
79 #define CFG_OFFSET (RCC_OFFSET + 0x04)
89 #define CLKINT_OFFSET (RCC_OFFSET + 0x08)
102 #define LDCTRL_OFFSET (RCC_OFFSET + 0x20)
113 #define CTRLSTS_OFFSET (RCC_OFFSET + 0x24)
/bsp/n32/libraries/N32G43x_Firmware_Library/n32g43x_std_periph_driver/src/
A Dn32g43x_rcc.c59 #define RCC_OFFSET (RCC_BASE - PERIPH_BASE) macro
64 #define CTRL_OFFSET (RCC_OFFSET + 0x00)
79 #define CFG_OFFSET (RCC_OFFSET + 0x04)
89 #define CLKINT_OFFSET (RCC_OFFSET + 0x08)
102 #define LDCTRL_OFFSET (RCC_OFFSET + 0x20)
113 #define CTRLSTS_OFFSET (RCC_OFFSET + 0x24)
/bsp/wch/arm/Libraries/CH32F20x_StdPeriph_Driver/StdPeriph_Driver/src/
A Dch32f20x_rcc.c11 #define RCC_OFFSET (RCC_BASE - PERIPH_BASE) macro
16 #define CFGR0_OFFSET (RCC_OFFSET + 0x04)
22 #define BDCTLR_OFFSET (RCC_OFFSET + 0x20)
/bsp/wch/risc-v/Libraries/CH32V10x_StdPeriph_Driver/StdPeriph_Driver/src/
A Dch32v10x_rcc.c13 #define RCC_OFFSET (RCC_BASE - PERIPH_BASE) macro
16 #define BDCTLR_OFFSET (RCC_OFFSET + 0x20)
/bsp/stm32/libraries/STM32L1xx_HAL/STM32L1xx_HAL_Driver/Inc/
A Dstm32l1xx_hal_rcc.h64 #define RCC_OFFSET (RCC_BASE - PERIPH_BASE) macro
77 #define RCC_CR_OFFSET_BB (RCC_OFFSET + RCC_CR_OFFSET)
78 #define RCC_CFGR_OFFSET_BB (RCC_OFFSET + RCC_CFGR_OFFSET)
79 #define RCC_CIR_OFFSET_BB (RCC_OFFSET + RCC_CIR_OFFSET)
80 #define RCC_CSR_OFFSET_BB (RCC_OFFSET + RCC_CSR_OFFSET)

Completed in 121 milliseconds